drm/amdgpu/umsch: update UMSCH 4.0 FW interface

Align with FW changes.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h
index 8258a43a6236c038e16098089e1de90495f51600..5014b5af95fd970c7ef15ffed4630a2928eb2c08 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umsch_mm.h
@@ -33,13 +33,6 @@ enum UMSCH_SWIP_ENGINE_TYPE {
        UMSCH_SWIP_ENGINE_TYPE_MAX
 };
 
-enum UMSCH_SWIP_AFFINITY_TYPE {
-       UMSCH_SWIP_AFFINITY_TYPE_ANY = 0,
-       UMSCH_SWIP_AFFINITY_TYPE_VCN0 = 1,
-       UMSCH_SWIP_AFFINITY_TYPE_VCN1 = 2,
-       UMSCH_SWIP_AFFINITY_TYPE_MAX
-};
-
 enum UMSCH_CONTEXT_PRIORITY_LEVEL {
        CONTEXT_PRIORITY_LEVEL_IDLE = 0,
        CONTEXT_PRIORITY_LEVEL_NORMAL = 1,
@@ -51,13 +44,15 @@ enum UMSCH_CONTEXT_PRIORITY_LEVEL {
 struct umsch_mm_set_resource_input {
        uint32_t vmid_mask_mm_vcn;
        uint32_t vmid_mask_mm_vpe;
+       uint32_t collaboration_mask_vpe;
        uint32_t logging_vmid;
        uint32_t engine_mask;
        union {
                struct {
                        uint32_t disable_reset : 1;
                        uint32_t disable_umsch_mm_log : 1;
-                       uint32_t reserved : 30;
+                       uint32_t use_rs64mem_for_proc_ctx_csa : 1;
+                       uint32_t reserved : 29;
                };
                uint32_t uint32_all;
        };
@@ -78,15 +73,18 @@ struct umsch_mm_add_queue_input {
        uint32_t doorbell_offset_1;
        enum UMSCH_SWIP_ENGINE_TYPE engine_type;
        uint32_t affinity;
-       enum UMSCH_SWIP_AFFINITY_TYPE affinity_type;
        uint64_t mqd_addr;
        uint64_t h_context;
        uint64_t h_queue;
        uint32_t vm_context_cntl;
 
+       uint32_t process_csa_array_index;
+       uint32_t context_csa_array_index;
+
        struct {
                uint32_t is_context_suspended : 1;
-               uint32_t reserved : 31;
+               uint32_t collaboration_mode : 1;
+               uint32_t reserved : 30;
        };
 };
 
@@ -94,6 +92,7 @@ struct umsch_mm_remove_queue_input {
        uint32_t doorbell_offset_0;
        uint32_t doorbell_offset_1;
        uint64_t context_csa_addr;
+       uint32_t context_csa_array_index;
 };
 
 struct MQD_INFO {
@@ -103,6 +102,7 @@ struct MQD_INFO {
        uint32_t wptr_val;
        uint32_t rptr_val;
        uint32_t unmapped;
+       uint32_t vmid;
 };
 
 struct amdgpu_umsch_mm;

diff --git a/drivers/gpu/drm/amd/include/umsch_mm_4_0_api_def.h b/drivers/gpu/drm/amd/include/umsch_mm_4_0_api_def.h
index beadb9e42850c75c0a32218cdf01c2d63f7bea47..ca83e9e5c3ffb8e2fd4b76995bec26a8b2e68c7a 100644 (file)
--- a/drivers/gpu/drm/amd/include/umsch_mm_4_0_api_def.h
+++ b/drivers/gpu/drm/amd/include/umsch_mm_4_0_api_def.h
@@ -234,7 +234,8 @@ union UMSCHAPI__SET_HW_RESOURCES {
                                uint32_t enable_level_process_quantum_check : 1;
                                uint32_t is_vcn0_enabled : 1;
                                uint32_t is_vcn1_enabled : 1;
-                               uint32_t reserved : 27;
+                               uint32_t use_rs64mem_for_proc_ctx_csa : 1;
+                               uint32_t reserved : 26;
                        };
                        uint32_t uint32_all;
                };
@@ -297,9 +298,12 @@ union UMSCHAPI__ADD_QUEUE {
 
                struct {
                        uint32_t is_context_suspended : 1;
-                       uint32_t reserved : 31;
+                       uint32_t collaboration_mode : 1;
+                       uint32_t reserved : 30;
                };
                struct UMSCH_API_STATUS api_status;
+               uint32_t process_csa_array_index;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -314,6 +318,7 @@ union UMSCHAPI__REMOVE_QUEUE {
                uint64_t context_csa_addr;
 
                struct UMSCH_API_STATUS api_status;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -337,6 +342,7 @@ union UMSCHAPI__SUSPEND {
                uint32_t suspend_fence_value;
 
                struct UMSCH_API_STATUS api_status;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -356,6 +362,7 @@ union UMSCHAPI__RESUME {
                enum UMSCH_ENGINE_TYPE engine_type;
 
                struct UMSCH_API_STATUS api_status;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -404,6 +411,7 @@ union UMSCHAPI__UPDATE_AFFINITY {
                union UMSCH_AFFINITY affinity;
                uint64_t context_csa_addr;
                struct UMSCH_API_STATUS api_status;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -417,6 +425,7 @@ union UMSCHAPI__CHANGE_CONTEXT_PRIORITY_LEVEL {
                uint64_t context_quantum;
                uint64_t context_csa_addr;
                struct UMSCH_API_STATUS api_status;
+               uint32_t context_csa_array_index;
        };
 
        uint32_t max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];