compatible = "mscc,ocelot-cpu-syscon", "syscon";
                reg = <0x70000000 0x2c>;
        };
+
+o HSIO regs:
+
+The SoC has a few registers (HSIO) handling miscellaneous functionalities:
+configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
+status, SerDes muxing and a thermal sensor.
+
+Required properties:
+- compatible: Should be "mscc,ocelot-hsio", "syscon", "simple-mfd"
+- reg : Should contain registers location and length
+
+Example:
+       syscon@10d0000 {
+               compatible = "mscc,ocelot-hsio", "syscon", "simple-mfd";
+               reg = <0x10d0000 0x10000>;
+       };
 
   - "sys"
   - "rew"
   - "qs"
-  - "hsio"
   - "qsys"
   - "ana"
   - "portX" with X from 0 to the number of last port index available on that
                reg = <0x1010000 0x10000>,
                      <0x1030000 0x10000>,
                      <0x1080000 0x100>,
-                     <0x10d0000 0x10000>,
                      <0x11e0000 0x100>,
                      <0x11f0000 0x100>,
                      <0x1200000 0x100>,
                      <0x1280000 0x100>,
                      <0x1800000 0x80000>,
                      <0x1880000 0x10000>;
-               reg-names = "sys", "rew", "qs", "hsio", "port0",
-                           "port1", "port2", "port3", "port4", "port5",
-                           "port6", "port7", "port8", "port9", "port10",
-                           "qsys", "ana";
+               reg-names = "sys", "rew", "qs", "port0", "port1", "port2",
+                           "port3", "port4", "port5", "port6", "port7",
+                           "port8", "port9", "port10", "qsys", "ana";
                interrupts = <21 22>;
                interrupt-names = "xtr", "inj";