struct device *dev = &pdev->dev;
        struct meson_gxbb_wdt *data;
        int ret;
+       u32 ctrl_reg;
 
        data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
        if (!data)
        watchdog_set_nowayout(&data->wdt_dev, nowayout);
        watchdog_set_drvdata(&data->wdt_dev, data);
 
+       ctrl_reg = readl(data->reg_base + GXBB_WDT_CTRL_REG) &
+                               GXBB_WDT_CTRL_EN;
+
+       if (ctrl_reg) {
+               /* Watchdog is running - keep it running but extend timeout
+                * to the maximum while setting the timebase
+                */
+               set_bit(WDOG_HW_RUNNING, &data->wdt_dev.status);
+               meson_gxbb_wdt_set_timeout(&data->wdt_dev,
+                               GXBB_WDT_TCNT_SETUP_MASK / 1000);
+       }
+
        /* Setup with 1ms timebase */
-       writel(((clk_get_rate(data->clk) / 1000) & GXBB_WDT_CTRL_DIV_MASK) |
-               GXBB_WDT_CTRL_EE_RESET |
-               GXBB_WDT_CTRL_CLK_EN |
-               GXBB_WDT_CTRL_CLKDIV_EN,
-               data->reg_base + GXBB_WDT_CTRL_REG);
+       ctrl_reg |= ((clk_get_rate(data->clk) / 1000) &
+                       GXBB_WDT_CTRL_DIV_MASK) |
+                       GXBB_WDT_CTRL_EE_RESET |
+                       GXBB_WDT_CTRL_CLK_EN |
+                       GXBB_WDT_CTRL_CLKDIV_EN;
 
+       writel(ctrl_reg, data->reg_base + GXBB_WDT_CTRL_REG);
        meson_gxbb_wdt_set_timeout(&data->wdt_dev, data->wdt_dev.timeout);
 
        return devm_watchdog_register_device(dev, &data->wdt_dev);