ath9k_hw: add pcieSerDesWrite to disable SERDES ASPM tweaks

This can be useful during testing of new ASPM tweaks which often
have to be done through the PCI Serializer-Deserializer (SERDES).

Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index efabab8d50c9f639dd41c20e193335de71b00740..99bde5f96a83e3c483dc0da0e8002ec35d8b919b 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -303,7 +303,7 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
         * Configire PCIE after Ini init. SERDES values now come from ini file
         * This enables PCIe low power mode.
         */
-       if (AR_SREV_9300_20_OR_LATER(ah)) {
+       if (ah->config.pcieSerDesWrite) {
                unsigned int i;
 
                for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) {

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 3ee7d4e0499f80ceeffc76ed9724bd9113db6514..e9764dc43121729523b302f7594a1b6ba38d441c 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -388,6 +388,7 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
                ah->config.ht_enable = 0;
 
        ah->config.rx_intr_mitigation = true;
+       ah->config.pcieSerDesWrite = true;
 
        /*
         * We need this for PCI devices only (Cardbus, PCI, miniPCI)

diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 6c6d47b0ed1b3c9d84ef529f2baea8cd6392122d..e9578a4c912f510b713f4e6248dbbfd7eb06ca97 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -235,6 +235,7 @@ struct ath9k_ops_config {
        int ack_6mb;
        u32 cwm_ignore_extcca;
        u8 pcie_powersave_enable;
+       bool pcieSerDesWrite;
        u8 pcie_clock_req;
        u32 pcie_waen;
        u8 analog_shiftreg;