static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
 {
-       struct drm_i915_private *dev_priv =
-               to_i915(plane_state->uapi.plane->dev);
+       struct intel_display *display = to_intel_display(plane_state);
        u32 base;
 
-       if (DISPLAY_INFO(dev_priv)->cursor_needs_physical)
+       if (DISPLAY_INFO(display)->cursor_needs_physical)
                base = plane_state->phys_dma_addr;
        else
                base = intel_plane_ggtt_offset(plane_state);
 
 static int intel_cursor_check_surface(struct intel_plane_state *plane_state)
 {
-       struct drm_i915_private *dev_priv =
-               to_i915(plane_state->uapi.plane->dev);
+       struct intel_display *display = to_intel_display(plane_state);
        unsigned int rotation = plane_state->hw.rotation;
        int src_x, src_y;
        u32 offset;
                                                    plane_state, 0);
 
        if (src_x != 0 || src_y != 0) {
-               drm_dbg_kms(&dev_priv->drm,
+               drm_dbg_kms(display->drm,
                            "Arbitrary cursor panning not supported\n");
                return -EINVAL;
        }
                              src_x << 16, src_y << 16);
 
        /* ILK+ do this automagically in hardware */
-       if (HAS_GMCH(dev_priv) && rotation & DRM_MODE_ROTATE_180) {
+       if (HAS_GMCH(display) && rotation & DRM_MODE_ROTATE_180) {
                const struct drm_framebuffer *fb = plane_state->hw.fb;
                int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
                int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
 static int intel_check_cursor(struct intel_crtc_state *crtc_state,
                              struct intel_plane_state *plane_state)
 {
+       struct intel_display *display = to_intel_display(plane_state);
        const struct drm_framebuffer *fb = plane_state->hw.fb;
-       struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
        const struct drm_rect src = plane_state->uapi.src;
        const struct drm_rect dst = plane_state->uapi.dst;
        int ret;
 
        if (fb && fb->modifier != DRM_FORMAT_MOD_LINEAR) {
-               drm_dbg_kms(&i915->drm, "cursor cannot be tiled\n");
+               drm_dbg_kms(display->drm, "cursor cannot be tiled\n");
                return -EINVAL;
        }
 
 static int i845_check_cursor(struct intel_crtc_state *crtc_state,
                             struct intel_plane_state *plane_state)
 {
+       struct intel_display *display = to_intel_display(plane_state);
        const struct drm_framebuffer *fb = plane_state->hw.fb;
-       struct drm_i915_private *i915 = to_i915(plane_state->uapi.plane->dev);
        int ret;
 
        ret = intel_check_cursor(crtc_state, plane_state);
 
        /* Check for which cursor types we support */
        if (!i845_cursor_size_ok(plane_state)) {
-               drm_dbg_kms(&i915->drm,
+               drm_dbg_kms(display->drm,
                            "Cursor dimension %dx%d not supported\n",
                            drm_rect_width(&plane_state->uapi.dst),
                            drm_rect_height(&plane_state->uapi.dst));
                return -EINVAL;
        }
 
-       drm_WARN_ON(&i915->drm, plane_state->uapi.visible &&
+       drm_WARN_ON(display->drm, plane_state->uapi.visible &&
                    plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
 
        switch (fb->pitches[0]) {
        case 2048:
                break;
        default:
-                drm_dbg_kms(&i915->drm, "Invalid cursor stride (%u)\n",
+                drm_dbg_kms(display->drm, "Invalid cursor stride (%u)\n",
                             fb->pitches[0]);
                return -EINVAL;
        }
                                   const struct intel_crtc_state *crtc_state,
                                   const struct intel_plane_state *plane_state)
 {
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        u32 cntl = 0, base = 0, pos = 0, size = 0;
 
        if (plane_state && plane_state->uapi.visible) {
        if (plane->cursor.base != base ||
            plane->cursor.size != size ||
            plane->cursor.cntl != cntl) {
-               intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
-               intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
-               intel_de_write_fw(dev_priv, CURSIZE(dev_priv, PIPE_A), size);
-               intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
-               intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
+               intel_de_write_fw(display, CURCNTR(display, PIPE_A), 0);
+               intel_de_write_fw(display, CURBASE(display, PIPE_A), base);
+               intel_de_write_fw(display, CURSIZE(display, PIPE_A), size);
+               intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
+               intel_de_write_fw(display, CURCNTR(display, PIPE_A), cntl);
 
                plane->cursor.base = base;
                plane->cursor.size = size;
                plane->cursor.cntl = cntl;
        } else {
-               intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
+               intel_de_write_fw(display, CURPOS(display, PIPE_A), pos);
        }
 }
 
                                     enum pipe *pipe)
 {
        struct intel_display *display = to_intel_display(plane);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
        intel_wakeref_t wakeref;
        bool ret;
        if (!wakeref)
                return false;
 
-       ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) & CURSOR_ENABLE;
+       ret = intel_de_read(display, CURCNTR(display, PIPE_A)) & CURSOR_ENABLE;
 
        *pipe = PIPE_A;
 
 
 static u32 i9xx_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state)
 {
+       struct intel_display *display = to_intel_display(crtc_state);
        struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
-       struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        u32 cntl = 0;
 
-       if (DISPLAY_VER(dev_priv) >= 11)
+       if (DISPLAY_VER(display) >= 11)
                return cntl;
 
        if (crtc_state->gamma_enable)
        if (crtc_state->csc_enable)
                cntl |= MCURSOR_PIPE_CSC_ENABLE;
 
-       if (DISPLAY_VER(dev_priv) < 5 && !IS_G4X(dev_priv))
+       if (DISPLAY_VER(display) < 5 && !display->platform.g4x)
                cntl |= MCURSOR_PIPE_SEL(crtc->pipe);
 
        return cntl;
 static u32 i9xx_cursor_ctl(const struct intel_crtc_state *crtc_state,
                           const struct intel_plane_state *plane_state)
 {
-       struct drm_i915_private *dev_priv =
-               to_i915(plane_state->uapi.plane->dev);
+       struct intel_display *display = to_intel_display(plane_state);
        u32 cntl = 0;
 
-       if (IS_SANDYBRIDGE(dev_priv) || IS_IVYBRIDGE(dev_priv))
+       if (display->platform.sandybridge || display->platform.ivybridge)
                cntl |= MCURSOR_TRICKLE_FEED_DISABLE;
 
        switch (drm_rect_width(&plane_state->uapi.dst)) {
                cntl |= MCURSOR_ROTATE_180;
 
        /* Wa_22012358565:adl-p */
-       if (DISPLAY_VER(dev_priv) == 13)
+       if (DISPLAY_VER(display) == 13)
                cntl |= MCURSOR_ARB_SLOTS(1);
 
        return cntl;
 
 static bool i9xx_cursor_size_ok(const struct intel_plane_state *plane_state)
 {
-       struct drm_i915_private *dev_priv =
-               to_i915(plane_state->uapi.plane->dev);
+       struct intel_display *display = to_intel_display(plane_state);
        int width = drm_rect_width(&plane_state->uapi.dst);
        int height = drm_rect_height(&plane_state->uapi.dst);
 
         * cursor is not rotated. Everything else requires square
         * cursors.
         */
-       if (HAS_CUR_FBC(dev_priv) &&
+       if (HAS_CUR_FBC(display) &&
            plane_state->hw.rotation & DRM_MODE_ROTATE_0) {
                if (height < 8 || height > width)
                        return false;
 static int i9xx_check_cursor(struct intel_crtc_state *crtc_state,
                             struct intel_plane_state *plane_state)
 {
+       struct intel_display *display = to_intel_display(plane_state);
        struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        const struct drm_framebuffer *fb = plane_state->hw.fb;
        enum pipe pipe = plane->pipe;
        int ret;
 
        /* Check for which cursor types we support */
        if (!i9xx_cursor_size_ok(plane_state)) {
-               drm_dbg(&dev_priv->drm,
+               drm_dbg(display->drm,
                        "Cursor dimension %dx%d not supported\n",
                        drm_rect_width(&plane_state->uapi.dst),
                        drm_rect_height(&plane_state->uapi.dst));
                return -EINVAL;
        }
 
-       drm_WARN_ON(&dev_priv->drm, plane_state->uapi.visible &&
+       drm_WARN_ON(display->drm, plane_state->uapi.visible &&
                    plane_state->view.color_plane[0].mapping_stride != fb->pitches[0]);
 
        if (fb->pitches[0] !=
            drm_rect_width(&plane_state->uapi.dst) * fb->format->cpp[0]) {
-               drm_dbg_kms(&dev_priv->drm,
+               drm_dbg_kms(display->drm,
                            "Invalid cursor stride (%u) (cursor width %d)\n",
                            fb->pitches[0],
                            drm_rect_width(&plane_state->uapi.dst));
         * display power well must be turned off and on again.
         * Refuse the put the cursor into that compromised position.
         */
-       if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C &&
+       if (display->platform.cherryview && pipe == PIPE_C &&
            plane_state->uapi.visible && plane_state->uapi.dst.x1 < 0) {
-               drm_dbg_kms(&dev_priv->drm,
+               drm_dbg_kms(display->drm,
                            "CHV cursor C not allowed to straddle the left screen edge\n");
                return -EINVAL;
        }
                                              struct intel_plane *plane,
                                              const struct intel_crtc_state *crtc_state)
 {
-       struct intel_display *display = to_intel_display(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        enum pipe pipe = plane->pipe;
 
        if (!crtc_state->enable_psr2_sel_fetch)
                           const struct intel_crtc_state *crtc_state,
                           const struct intel_plane_state *plane_state)
 {
-       struct intel_display *display = to_intel_display(plane->base.dev);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        u32 ctl = plane_state->ctl;
        int et_y_position = drm_rect_height(&crtc_state->pipe_src) + 1;
        enum pipe pipe = plane->pipe;
 
        intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), ctl);
 
-       intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe),
+       intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe),
                           CURSOR_POS_Y(et_y_position));
 }
 
                                             const struct intel_crtc_state *crtc_state,
                                             const struct intel_plane_state *plane_state)
 {
-       struct intel_display *display = to_intel_display(plane->base.dev);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        enum pipe pipe = plane->pipe;
 
        if (!crtc_state->enable_psr2_sel_fetch)
                        u32 val = intel_cursor_position(crtc_state, plane_state,
                                true);
 
-                       intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(dev_priv, pipe), val);
+                       intel_de_write_dsb(display, dsb, CURPOS_ERLY_TPT(display, pipe), val);
                }
 
                intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), plane_state->ctl);
                                   const struct intel_crtc_state *crtc_state,
                                   const struct intel_plane_state *plane_state)
 {
-       struct intel_display *display = to_intel_display(plane->base.dev);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        enum pipe pipe = plane->pipe;
        u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
 
         * the CURCNTR write arms the update.
         */
 
-       if (DISPLAY_VER(dev_priv) >= 9)
+       if (DISPLAY_VER(display) >= 9)
                skl_write_cursor_wm(dsb, plane, crtc_state);
 
        if (plane_state)
        if (plane->cursor.base != base ||
            plane->cursor.size != fbc_ctl ||
            plane->cursor.cntl != cntl) {
-               if (HAS_CUR_FBC(dev_priv))
-                       intel_de_write_dsb(display, dsb, CUR_FBC_CTL(dev_priv, pipe), fbc_ctl);
-               intel_de_write_dsb(display, dsb, CURCNTR(dev_priv, pipe), cntl);
-               intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
-               intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
+               if (HAS_CUR_FBC(display))
+                       intel_de_write_dsb(display, dsb, CUR_FBC_CTL(display, pipe), fbc_ctl);
+               intel_de_write_dsb(display, dsb, CURCNTR(display, pipe), cntl);
+               intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
+               intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
 
                plane->cursor.base = base;
                plane->cursor.size = fbc_ctl;
                plane->cursor.cntl = cntl;
        } else {
-               intel_de_write_dsb(display, dsb, CURPOS(dev_priv, pipe), pos);
-               intel_de_write_dsb(display, dsb, CURBASE(dev_priv, pipe), base);
+               intel_de_write_dsb(display, dsb, CURPOS(display, pipe), pos);
+               intel_de_write_dsb(display, dsb, CURBASE(display, pipe), base);
        }
 }
 
                                     enum pipe *pipe)
 {
        struct intel_display *display = to_intel_display(plane);
-       struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
        enum intel_display_power_domain power_domain;
        intel_wakeref_t wakeref;
        bool ret;
        if (!wakeref)
                return false;
 
-       val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));
+       val = intel_de_read(display, CURCNTR(display, plane->pipe));
 
        ret = val & MCURSOR_MODE_MASK;
 
-       if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+       if (DISPLAY_VER(display) >= 5 || display->platform.g4x)
                *pipe = plane->pipe;
        else
                *pipe = REG_FIELD_GET(MCURSOR_PIPE_SEL_MASK, val);
 {
        struct intel_plane *plane = to_intel_plane(_plane);
        struct intel_crtc *crtc = to_intel_crtc(_crtc);
-       struct drm_i915_private *i915 = to_i915(plane->base.dev);
+       struct intel_display *display = to_intel_display(plane);
        struct intel_plane_state *old_plane_state =
                to_intel_plane_state(plane->base.state);
        struct intel_plane_state *new_plane_state;
 
        intel_psr_lock(crtc_state);
 
-       if (!drm_WARN_ON(&i915->drm, drm_crtc_vblank_get(&crtc->base))) {
+       if (!drm_WARN_ON(display->drm, drm_crtc_vblank_get(&crtc->base))) {
                /*
                 * TODO: maybe check if we're still in PSR
                 * and skip the vblank evasion entirely?
 
 static void intel_cursor_add_size_hints_property(struct intel_plane *plane)
 {
-       struct drm_i915_private *i915 = to_i915(plane->base.dev);
-       const struct drm_mode_config *config = &i915->drm.mode_config;
+       struct intel_display *display = to_intel_display(plane);
+       const struct drm_mode_config *config = &display->drm->mode_config;
        struct drm_plane_size_hint hints[4];
        int size, max_size, num_hints = 0;
 
 
        /* for simplicity only enumerate the supported square+POT sizes */
        for (size = 64; size <= max_size; size *= 2) {
-               if (drm_WARN_ON(&i915->drm, num_hints >= ARRAY_SIZE(hints)))
+               if (drm_WARN_ON(display->drm, num_hints >= ARRAY_SIZE(hints)))
                        break;
 
                hints[num_hints].width = size;
 }
 
 struct intel_plane *
-intel_cursor_plane_create(struct drm_i915_private *dev_priv,
+intel_cursor_plane_create(struct intel_display *display,
                          enum pipe pipe)
 {
-       struct intel_display *display = &dev_priv->display;
        struct intel_plane *cursor;
        int ret, zpos;
        u64 *modifiers;
        cursor->id = PLANE_CURSOR;
        cursor->frontbuffer_bit = INTEL_FRONTBUFFER(pipe, cursor->id);
 
-       if (IS_I845G(dev_priv) || IS_I865G(dev_priv)) {
+       if (display->platform.i845g || display->platform.i865g) {
                cursor->max_stride = i845_cursor_max_stride;
                cursor->min_alignment = i845_cursor_min_alignment;
                cursor->update_arm = i845_cursor_update_arm;
        } else {
                cursor->max_stride = i9xx_cursor_max_stride;
 
-               if (IS_I830(dev_priv))
+               if (display->platform.i830)
                        cursor->min_alignment = i830_cursor_min_alignment;
-               else if (IS_I85X(dev_priv))
+               else if (display->platform.i85x)
                        cursor->min_alignment = i85x_cursor_min_alignment;
                else
                        cursor->min_alignment = i9xx_cursor_min_alignment;
        cursor->cursor.base = ~0;
        cursor->cursor.cntl = ~0;
 
-       if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
+       if (display->platform.i845g || display->platform.i865g || HAS_CUR_FBC(display))
                cursor->cursor.size = ~0;
 
        modifiers = intel_fb_plane_get_modifiers(display, INTEL_PLANE_CAP_NONE);
 
-       ret = drm_universal_plane_init(&dev_priv->drm, &cursor->base,
+       ret = drm_universal_plane_init(display->drm, &cursor->base,
                                       0, &intel_cursor_plane_funcs,
                                       intel_cursor_formats,
                                       ARRAY_SIZE(intel_cursor_formats),
        if (ret)
                goto fail;
 
-       if (DISPLAY_VER(dev_priv) >= 4)
+       if (DISPLAY_VER(display) >= 4)
                drm_plane_create_rotation_property(&cursor->base,
                                                   DRM_MODE_ROTATE_0,
                                                   DRM_MODE_ROTATE_0 |
 
        intel_cursor_add_size_hints_property(cursor);
 
-       zpos = DISPLAY_RUNTIME_INFO(dev_priv)->num_sprites[pipe] + 1;
+       zpos = DISPLAY_RUNTIME_INFO(display)->num_sprites[pipe] + 1;
        drm_plane_create_zpos_immutable_property(&cursor->base, zpos);
 
-       if (DISPLAY_VER(dev_priv) >= 12)
+       if (DISPLAY_VER(display) >= 12)
                drm_plane_enable_fb_damage_clips(&cursor->base);
 
        intel_plane_helper_add(cursor);