]> www.infradead.org Git - users/dwmw2/linux.git/commitdiff
drm/amdgpu: refine aca error cache for umc v12.0
authorYang Wang <kevinyang.wang@amd.com>
Thu, 22 Feb 2024 02:11:46 +0000 (10:11 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Mar 2024 17:38:15 +0000 (13:38 -0400)
refine aca error cache for umc v12.0

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/umc_v12_0.c

index 7b841431344f2407ced7512365faa1762074b89f..b512a4b38067499b721ccde19797bcc91abaac6c 100644 (file)
@@ -508,10 +508,11 @@ static int umc_v12_0_aca_bank_generate_report(struct aca_handle *handle, struct
                                              struct aca_bank_report *report, void *data)
 {
        struct amdgpu_device *adev = handle->adev;
+       struct aca_bank_info info;
        u64 status;
        int ret;
 
-       ret = aca_bank_info_decode(bank, &report->info);
+       ret = aca_bank_info_decode(bank, &info);
        if (ret)
                return ret;
 
@@ -519,12 +520,18 @@ static int umc_v12_0_aca_bank_generate_report(struct aca_handle *handle, struct
        switch (type) {
        case ACA_SMU_TYPE_UE:
                if (umc_v12_0_is_uncorrectable_error(adev, status)) {
-                       report->count[ACA_ERROR_TYPE_UE] = 1;
+                       ret = aca_error_cache_log_bank_error(handle, &info, ACA_ERROR_TYPE_UE,
+                                                            1ULL);
+                       if (ret)
+                               return ret;
                }
                break;
        case ACA_SMU_TYPE_CE:
                if (umc_v12_0_is_correctable_error(adev, status)) {
-                       report->count[ACA_ERROR_TYPE_CE] = 1;
+                       ret = aca_error_cache_log_bank_error(handle, &info, ACA_ERROR_TYPE_UE,
+                                                            1ULL);
+                       if (ret)
+                               return ret;
                }
                break;
        default: