i.MX6Q needs to update vddarm, vddsoc/pu regulators when cpu freq
is changed, each setpoint has different voltage, so we need to
pass vddarm, vddsoc/pu's freq-voltage info from dts together.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
                                792000  1150000
                                396000  975000
                        >;
+                       fsl,soc-operating-points = <
+                               /* ARM kHz  SOC-PU uV */
+                               1200000 1275000
+                               996000  1250000
+                               792000  1175000
+                               396000  1175000
+                       >;
                        clock-latency = <61036>; /* two CLK32 periods */
                        clocks = <&clks 104>, <&clks 6>, <&clks 16>,
                                 <&clks 17>, <&clks 170>;