static const struct reg_sequence rt5650_init_list[] = {
        {0xf6,  0x0100},
        {RT5645_PWR_ANLG1, 0x02},
-       {RT5645_IL_CMD3, 0x0018},
+       {RT5645_IL_CMD3, 0x6728},
 };
 
 static const struct reg_default rt5645_reg[] = {
        bool enable)
 {
        struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
+       int ret;
 
        if (enable) {
                snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
                snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
                snd_soc_dapm_sync(dapm);
 
+               snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2,
+                       RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK,
+                       RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_RST);
+               usleep_range(10000, 15000);
+               snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2,
+                       RT5645_EN_4BTN_IL_MASK | RT5645_RST_4BTN_IL_MASK,
+                       RT5645_EN_4BTN_IL_EN | RT5645_RST_4BTN_IL_NORM);
+               msleep(50);
+               ret = snd_soc_component_read(component, RT5645_INT_IRQ_ST);
+               pr_debug("%s read %x = %x\n", __func__, RT5645_INT_IRQ_ST,
+                       snd_soc_component_read(component, RT5645_INT_IRQ_ST));
+               snd_soc_component_write(component, RT5645_INT_IRQ_ST, ret);
+               ret = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
+               pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
+                       snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
+               snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, ret);
                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
                snd_soc_component_update_bits(component,
                                        RT5645_INT_IRQ_ST, 0x8, 0x8);
-               snd_soc_component_update_bits(component,
-                                       RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
-               snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
-               pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
-                       snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
        } else {
                snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
                snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);