drm/amd/display: Update FMT settings for 4:2:0

[Why] Update FMT_CONTROL settings based on HW spec
[How] Update FMT settings for 4:2:0

Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
index 5838a11efd00c4e6cfce8b3d86e9c43413ae4374..71e9288d60ed7cd7275c063813d0c53f9e748631 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.c
@@ -168,6 +168,10 @@ static void opp1_set_pixel_encoding(
 
        case PIXEL_ENCODING_RGB:
        case PIXEL_ENCODING_YCBCR444:
+               REG_UPDATE_3(FMT_CONTROL,
+                               FMT_PIXEL_ENCODING, 0,
+                               FMT_SUBSAMPLING_MODE, 0,
+                               FMT_CBCR_BIT_REDUCTION_BYPASS, 0);
                REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 0);
                break;
        case PIXEL_ENCODING_YCBCR422:
@@ -177,7 +181,10 @@ static void opp1_set_pixel_encoding(
                                FMT_CBCR_BIT_REDUCTION_BYPASS, 0);
                break;
        case PIXEL_ENCODING_YCBCR420:
-               REG_UPDATE(FMT_CONTROL, FMT_PIXEL_ENCODING, 2);
+               REG_UPDATE_3(FMT_CONTROL,
+                               FMT_PIXEL_ENCODING, 2,
+                               FMT_SUBSAMPLING_MODE, 2,
+                               FMT_CBCR_BIT_REDUCTION_BYPASS, 1);
                break;
        default:
                break;

diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h
index 2c0ecfa5a643affe7f190de7adb1fe0dc865b22f..c87de68a509e49184fca0892ad99a43238aefe46 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_opp.h
@@ -79,6 +79,8 @@
        OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_MAX, mask_sh), \
        OPP_SF(FMT0_FMT_CONTROL, FMT_SPATIAL_DITHER_FRAME_COUNTER_BIT_SWAP, mask_sh), \
        OPP_SF(FMT0_FMT_CONTROL, FMT_PIXEL_ENCODING, mask_sh), \
+       OPP_SF(FMT0_FMT_CONTROL, FMT_SUBSAMPLING_MODE, mask_sh), \
+       OPP_SF(FMT0_FMT_CONTROL, FMT_CBCR_BIT_REDUCTION_BYPASS, mask_sh), \
        OPP_SF(FMT0_FMT_CONTROL, FMT_STEREOSYNC_OVERRIDE, mask_sh), \
        OPP_SF(FMT0_FMT_DITHER_RAND_R_SEED, FMT_RAND_R_SEED, mask_sh), \
        OPP_SF(FMT0_FMT_DITHER_RAND_G_SEED, FMT_RAND_G_SEED, mask_sh), \