phy: cdns-dphy: Store hs_clk_rate and return it

The DPHY driver does not return the actual hs_clk_rate, so the DSI
driver has no idea what clock was actually achieved. Set the realized
hs_clk_rate to the opts struct, so that the DSI driver gets it back.

Reviewed-by: Aradhya Bhatia <aradhya.bhatia@linux.dev>
Tested-by: Parth Pancholi <parth.pancholi@toradex.com>
Tested-by: Jayesh Choudhary <j-choudhary@ti.com>
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Link: https://lore.kernel.org/r/20250723-cdns-dphy-hs-clk-rate-fix-v1-1-d4539d44cbe7@ideasonboard.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/phy/cadence/cdns-dphy.c b/drivers/phy/cadence/cdns-dphy.c
index ed87a3970f834300113eebbfd785d5f3b2a26449..f79ec4fab40936fbb568a05bd077efe5c45baaca 100644 (file)
--- a/drivers/phy/cadence/cdns-dphy.c
+++ b/drivers/phy/cadence/cdns-dphy.c
@@ -79,6 +79,7 @@ struct cdns_dphy_cfg {
        u8 pll_ipdiv;
        u8 pll_opdiv;
        u16 pll_fbdiv;
+       u32 hs_clk_rate;
        unsigned int nlanes;
 };
 
@@ -154,6 +155,9 @@ static int cdns_dsi_get_dphy_pll_cfg(struct cdns_dphy *dphy,
                                          cfg->pll_ipdiv,
                                          pll_ref_hz);
 
+       cfg->hs_clk_rate = div_u64((u64)pll_ref_hz * cfg->pll_fbdiv,
+                                  2 * cfg->pll_opdiv * cfg->pll_ipdiv);
+
        return 0;
 }
 
@@ -297,6 +301,7 @@ static int cdns_dphy_config_from_opts(struct phy *phy,
        if (ret)
                return ret;
 
+       opts->hs_clk_rate = cfg->hs_clk_rate;
        opts->wakeup = cdns_dphy_get_wakeup_time_ns(dphy) / 1000;
 
        return 0;