clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C1>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 21>, <&gpcdma 21>;
                dma-names = "rx", "tx";
                status = "disabled";
                clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C3>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 23>, <&gpcdma 23>;
                dma-names = "rx", "tx";
                status = "disabled";
                pinctrl-names = "default", "idle";
                pinctrl-0 = <&state_dpaux1_i2c>;
                pinctrl-1 = <&state_dpaux1_off>;
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 26>, <&gpcdma 26>;
                dma-names = "rx", "tx";
                status = "disabled";
                pinctrl-names = "default", "idle";
                pinctrl-0 = <&state_dpaux_i2c>;
                pinctrl-1 = <&state_dpaux_off>;
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 30>, <&gpcdma 30>;
                dma-names = "rx", "tx";
                status = "disabled";
                clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C7>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 27>, <&gpcdma 27>;
                dma-names = "rx", "tx";
                status = "disabled";
                clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C9>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 31>, <&gpcdma 31>;
                dma-names = "rx", "tx";
                status = "disabled";
                clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C2>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 22>, <&gpcdma 22>;
                dma-names = "rx", "tx";
                status = "disabled";
                clock-names = "div-clk";
                resets = <&bpmp TEGRA186_RESET_I2C8>;
                reset-names = "i2c";
-               iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
-               dma-coherent;
                dmas = <&gpcdma 0>, <&gpcdma 0>;
                dma-names = "rx", "tx";
                status = "disabled";
 
                        clock-names = "div-clk";
                        resets = <&bpmp TEGRA194_RESET_I2C1>;
                        reset-names = "i2c";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 21>, <&gpcdma 21>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        clock-names = "div-clk";
                        resets = <&bpmp TEGRA194_RESET_I2C3>;
                        reset-names = "i2c";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 23>, <&gpcdma 23>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        pinctrl-0 = <&state_dpaux1_i2c>;
                        pinctrl-1 = <&state_dpaux1_off>;
                        pinctrl-names = "default", "idle";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 26>, <&gpcdma 26>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        pinctrl-0 = <&state_dpaux0_i2c>;
                        pinctrl-1 = <&state_dpaux0_off>;
                        pinctrl-names = "default", "idle";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 30>, <&gpcdma 30>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        pinctrl-0 = <&state_dpaux2_i2c>;
                        pinctrl-1 = <&state_dpaux2_off>;
                        pinctrl-names = "default", "idle";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 27>, <&gpcdma 27>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        pinctrl-0 = <&state_dpaux3_i2c>;
                        pinctrl-1 = <&state_dpaux3_off>;
                        pinctrl-names = "default", "idle";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 31>, <&gpcdma 31>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        clock-names = "div-clk";
                        resets = <&bpmp TEGRA194_RESET_I2C2>;
                        reset-names = "i2c";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 22>, <&gpcdma 22>;
                        dma-names = "rx", "tx";
                        status = "disabled";
                        clock-names = "div-clk";
                        resets = <&bpmp TEGRA194_RESET_I2C8>;
                        reset-names = "i2c";
-                       iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
-                       dma-coherent;
                        dmas = <&gpcdma 0>, <&gpcdma 0>;
                        dma-names = "rx", "tx";
                        status = "disabled";
 
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C1>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 21>, <&gpcdma 21>;
                        dma-names = "rx", "tx";
                };
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C3>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 23>, <&gpcdma 23>;
                        dma-names = "rx", "tx";
                };
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C4>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 26>, <&gpcdma 26>;
                        dma-names = "rx", "tx";
                };
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C6>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 30>, <&gpcdma 30>;
                        dma-names = "rx", "tx";
                };
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C7>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 27>, <&gpcdma 27>;
                        dma-names = "rx", "tx";
                };
                        clock-names = "div-clk", "parent";
                        resets = <&bpmp TEGRA234_RESET_I2C9>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 31>, <&gpcdma 31>;
                        dma-names = "rx", "tx";
                };
                        assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
                        resets = <&bpmp TEGRA234_RESET_I2C2>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 22>, <&gpcdma 22>;
                        dma-names = "rx", "tx";
                };
                        assigned-clock-parents = <&bpmp TEGRA234_CLK_PLLP_OUT0>;
                        resets = <&bpmp TEGRA234_RESET_I2C8>;
                        reset-names = "i2c";
-                       iommus = <&smmu_niso0 TEGRA234_SID_GPCDMA>;
-                       dma-coherent;
                        dmas = <&gpcdma 0>, <&gpcdma 0>;
                        dma-names = "rx", "tx";
                };