return r;
                }
 
-               fence = amdgpu_ctx_get_fence(ctx, entity,
-                                            deps[i].handle);
+               fence = amdgpu_ctx_get_fence(ctx, entity, deps[i].handle);
+               amdgpu_ctx_put(ctx);
+
+               if (IS_ERR(fence))
+                       return PTR_ERR(fence);
+               else if (!fence)
+                       continue;
 
                if (chunk->chunk_id == AMDGPU_CHUNK_ID_SCHEDULED_DEPENDENCIES) {
-                       struct drm_sched_fence *s_fence = to_drm_sched_fence(fence);
+                       struct drm_sched_fence *s_fence;
                        struct dma_fence *old = fence;
 
+                       s_fence = to_drm_sched_fence(fence);
                        fence = dma_fence_get(&s_fence->scheduled);
                        dma_fence_put(old);
                }
 
-               if (IS_ERR(fence)) {
-                       r = PTR_ERR(fence);
-                       amdgpu_ctx_put(ctx);
+               r = amdgpu_sync_fence(p->adev, &p->job->sync, fence, true);
+               dma_fence_put(fence);
+               if (r)
                        return r;
-               } else if (fence) {
-                       r = amdgpu_sync_fence(p->adev, &p->job->sync, fence,
-                                       true);
-                       dma_fence_put(fence);
-                       amdgpu_ctx_put(ctx);
-                       if (r)
-                               return r;
-               }
        }
        return 0;
 }