drm/i915/mtl: Enable Idle Messaging for GSC CS

By defaut idle messaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.

v2:
 - Fix review comments (Vinay)
 - Set GSC idle hysteresis as per spec (Badal)
v3:
 - Fix review comments (Rodrigo)

Bspec: 71496

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221118183354.1047829-1-badal.nilawar@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index b0a4a2dbe3ee9a1493d4047daf6298a7345f802d..e971b153fda97698cfb2b234d5a183bf94e5b128 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -15,6 +15,22 @@
 #include "intel_rc6.h"
 #include "intel_ring.h"
 #include "shmem_utils.h"
+#include "intel_gt_regs.h"
+
+static void intel_gsc_idle_msg_enable(struct intel_engine_cs *engine)
+{
+       struct drm_i915_private *i915 = engine->i915;
+
+       if (IS_METEORLAKE(i915) && engine->id == GSC0) {
+               intel_uncore_write(engine->gt->uncore,
+                                  RC_PSMI_CTRL_GSCCS,
+                                  _MASKED_BIT_DISABLE(IDLE_MSG_DISABLE));
+               /* hysteresis 0xA=5us as recommended in spec*/
+               intel_uncore_write(engine->gt->uncore,
+                                  PWRCTX_MAXCNT_GSCCS,
+                                  0xA);
+       }
+}
 
 static void dbg_poison_ce(struct intel_context *ce)
 {
@@ -275,6 +291,8 @@ void intel_engine_init__pm(struct intel_engine_cs *engine)
 
        intel_wakeref_init(&engine->wakeref, rpm, &wf_ops);
        intel_engine_init_heartbeat(engine);
+
+       intel_gsc_idle_msg_enable(engine);
 }
 
 /**

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index bd3848bd7b6a5f1780c79a0766111bb9e5cbaf22..3658e12db74bc99e7f4c5c0e1bce8fcdeeefc4f9 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -916,6 +916,10 @@
 #define  MSG_IDLE_FW_MASK      REG_GENMASK(13, 9)
 #define  MSG_IDLE_FW_SHIFT     9
 
+#define        RC_PSMI_CTRL_GSCCS      _MMIO(0x11a050)
+#define          IDLE_MSG_DISABLE      REG_BIT(0)
+#define        PWRCTX_MAXCNT_GSCCS     _MMIO(0x11a054)
+
 #define FORCEWAKE_MEDIA_GEN9                   _MMIO(0xa270)
 #define FORCEWAKE_RENDER_GEN9                  _MMIO(0xa278)