struct hwtstamp_config    *tstamp;
        DECLARE_BITMAP(state, MLX5E_CHANNEL_NUM_STATES);
        int                        ix;
+       int                        vec_ix;
        int                        cpu;
        /* Sync between icosq recovery and XSK enable/disable. */
        struct mutex               icosq_recovery_lock;
 
                .napi = &c->napi,
                .ch_stats = c->stats,
                .node = cpu_to_node(c->cpu),
-               .ix = c->ix,
+               .ix = c->vec_ix,
        };
 }
 
 
 
        memset(¶m_sq, 0, sizeof(param_sq));
        memset(¶m_cq, 0, sizeof(param_cq));
-       mlx5e_build_sq_param(priv->mdev, params, ¶m_sq);
-       mlx5e_build_tx_cq_param(priv->mdev, params, ¶m_cq);
+       mlx5e_build_sq_param(c->mdev, params, ¶m_sq);
+       mlx5e_build_tx_cq_param(c->mdev, params, ¶m_cq);
        err = mlx5e_open_cq(c->mdev, params->tx_cq_moderation, ¶m_cq, &ccp, &sq->cq);
        if (err)
                goto err_free_sq;
         */
        smp_wmb();
 
-       qos_dbg(priv->mdev, "Activate QoS SQ qid %u\n", node_qid);
+       qos_dbg(sq->mdev, "Activate QoS SQ qid %u\n", node_qid);
        mlx5e_activate_txqsq(sq);
 
        return 0;
        if (!sq) /* Handle the case when the SQ failed to open. */
                return;
 
-       qos_dbg(priv->mdev, "Deactivate QoS SQ qid %u\n", qid);
+       qos_dbg(sq->mdev, "Deactivate QoS SQ qid %u\n", qid);
        mlx5e_deactivate_txqsq(sq);
 
        priv->txq2sq[mlx5e_qid_from_qos(&priv->channels, qid)] = NULL;
 
 
        params = &priv->channels.params;
        rq_sz = mlx5e_rqwq_get_size(rq);
-       real_time =  mlx5_is_real_time_rq(priv->mdev);
-       rq_stride = BIT(mlx5e_mpwqe_get_log_stride_size(priv->mdev, params, NULL));
+       real_time =  mlx5_is_real_time_rq(rq->mdev);
+       rq_stride = BIT(mlx5e_mpwqe_get_log_stride_size(rq->mdev, params, NULL));
 
        mlx5e_health_fmsg_named_obj_nest_start(fmsg, "RQ");
        devlink_fmsg_u8_pair_put(fmsg, "type", params->rq_wq_type);
 
                                                  struct mlx5e_txqsq *sq, int tc)
 {
        bool stopped = netif_xmit_stopped(sq->txq);
-       struct mlx5e_priv *priv = sq->priv;
        u8 state;
        int err;
 
        devlink_fmsg_u32_pair_put(fmsg, "txq ix", sq->txq_ix);
        devlink_fmsg_u32_pair_put(fmsg, "sqn", sq->sqn);
 
-       err = mlx5_core_query_sq_state(priv->mdev, sq->sqn, &state);
+       err = mlx5_core_query_sq_state(sq->mdev, sq->sqn, &state);
        if (!err)
                devlink_fmsg_u8_pair_put(fmsg, "HW state", state);
 
 
 #include "setup.h"
 #include "en/params.h"
 
-static int mlx5e_xsk_map_pool(struct mlx5e_priv *priv,
+static int mlx5e_xsk_map_pool(struct mlx5_core_dev *mdev,
                              struct xsk_buff_pool *pool)
 {
-       struct device *dev = mlx5_core_dma_dev(priv->mdev);
+       struct device *dev = mlx5_core_dma_dev(mdev);
 
        return xsk_pool_dma_map(pool, dev, DMA_ATTR_SKIP_CPU_SYNC);
 }
        if (unlikely(!mlx5e_xsk_is_pool_sane(pool)))
                return -EINVAL;
 
-       err = mlx5e_xsk_map_pool(priv, pool);
+       err = mlx5e_xsk_map_pool(mlx5_sd_ch_ix_get_dev(priv->mdev, ix), pool);
        if (unlikely(err))
                return err;
 
 
                goto err_out;
        }
 
-       pdev = mlx5_core_dma_dev(sq->channel->priv->mdev);
+       pdev = mlx5_core_dma_dev(sq->channel->mdev);
        buf->dma_addr = dma_map_single(pdev, &buf->progress,
                                       PROGRESS_PARAMS_PADDED_SIZE, DMA_FROM_DEVICE);
        if (unlikely(dma_mapping_error(pdev, buf->dma_addr))) {
 {
        struct mlx5e_ktls_rx_resync_buf *buf = wi->tls_get_params.buf;
        struct mlx5e_ktls_offload_context_rx *priv_rx;
-       struct mlx5e_ktls_rx_resync_ctx *resync;
        u8 tracker_state, auth_state, *ctx;
        struct device *dev;
        u32 hw_seq;
 
        priv_rx = buf->priv_rx;
-       resync = &priv_rx->resync;
-       dev = mlx5_core_dma_dev(resync->priv->mdev);
+       dev = mlx5_core_dma_dev(sq->channel->mdev);
        if (unlikely(test_bit(MLX5E_PRIV_RX_FLAG_DELETING, priv_rx->flags)))
                goto out;
 
 
                              struct xsk_buff_pool *xsk_pool,
                              struct mlx5e_channel **cp)
 {
-       int cpu = mlx5_comp_vector_get_cpu(priv->mdev, ix);
        struct net_device *netdev = priv->netdev;
+       struct mlx5_core_dev *mdev;
        struct mlx5e_xsk_param xsk;
        struct mlx5e_channel *c;
        unsigned int irq;
+       int vec_ix;
+       int cpu;
        int err;
 
-       err = mlx5_comp_irqn_get(priv->mdev, ix, &irq);
+       mdev = mlx5_sd_ch_ix_get_dev(priv->mdev, ix);
+       vec_ix = mlx5_sd_ch_ix_get_vec_ix(mdev, ix);
+       cpu = mlx5_comp_vector_get_cpu(mdev, vec_ix);
+
+       err = mlx5_comp_irqn_get(mdev, vec_ix, &irq);
        if (err)
                return err;
 
                return -ENOMEM;
 
        c->priv     = priv;
-       c->mdev     = priv->mdev;
+       c->mdev     = mdev;
        c->tstamp   = &priv->tstamp;
        c->ix       = ix;
+       c->vec_ix   = vec_ix;
        c->cpu      = cpu;
-       c->pdev     = mlx5_core_dma_dev(priv->mdev);
+       c->pdev     = mlx5_core_dma_dev(mdev);
        c->netdev   = priv->netdev;
-       c->mkey_be  = cpu_to_be32(priv->mdev->mlx5e_res.hw_objs.mkey);
+       c->mkey_be  = cpu_to_be32(mdev->mlx5e_res.hw_objs.mkey);
        c->num_tc   = mlx5e_get_dcb_num_tc(params);
        c->xdp      = !!params->xdp_prog;
        c->stats    = &priv->channel_stats[ix]->ch;
        c->aff_mask = irq_get_effective_affinity_mask(irq);
-       c->lag_port = mlx5e_enumerate_lag_port(priv->mdev, ix);
+       c->lag_port = mlx5e_enumerate_lag_port(mdev, ix);
 
        netif_napi_add(netdev, &c->napi, mlx5e_napi_poll);
        netif_napi_set_irq(&c->napi, irq);
 static void mlx5e_set_default_xps_cpumasks(struct mlx5e_priv *priv,
                                           struct mlx5e_params *params)
 {
-       struct mlx5_core_dev *mdev = priv->mdev;
-       int num_comp_vectors, ix, irq;
-
-       num_comp_vectors = mlx5_comp_vectors_max(mdev);
+       int ix;
 
        for (ix = 0; ix < params->num_channels; ix++) {
+               int num_comp_vectors, irq, vec_ix;
+               struct mlx5_core_dev *mdev;
+
+               mdev = mlx5_sd_ch_ix_get_dev(priv->mdev, ix);
+               num_comp_vectors = mlx5_comp_vectors_max(mdev);
                cpumask_clear(priv->scratchpad.cpumask);
+               vec_ix = mlx5_sd_ch_ix_get_vec_ix(mdev, ix);
 
-               for (irq = ix; irq < num_comp_vectors; irq += params->num_channels) {
+               for (irq = vec_ix; irq < num_comp_vectors; irq += params->num_channels) {
                        int cpu = mlx5_comp_vector_get_cpu(mdev, irq);
 
                        cpumask_set_cpu(cpu, priv->scratchpad.cpumask);