ARM: dts: rockchip: fix PWM clock found on RK3288 Socs

We use the new PWM IP on RK3288, but the PWM's clock indeed incorrect.

Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index aa017abf4f42179b11ee02008b1ab24f2c2e3386..171231a0cd9b73da63159ffa970cbe86607a110e 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -682,7 +682,7 @@
                #pwm-cells = <3>;
                pinctrl-names = "default";
                pinctrl-0 = <&pwm0_pin>;
-               clocks = <&cru PCLK_PWM>;
+               clocks = <&cru PCLK_RKPWM>;
                clock-names = "pwm";
                status = "disabled";
        };
@@ -693,7 +693,7 @@
                #pwm-cells = <3>;
                pinctrl-names = "default";
                pinctrl-0 = <&pwm1_pin>;
-               clocks = <&cru PCLK_PWM>;
+               clocks = <&cru PCLK_RKPWM>;
                clock-names = "pwm";
                status = "disabled";
        };
@@ -704,7 +704,7 @@
                #pwm-cells = <3>;
                pinctrl-names = "default";
                pinctrl-0 = <&pwm2_pin>;
-               clocks = <&cru PCLK_PWM>;
+               clocks = <&cru PCLK_RKPWM>;
                clock-names = "pwm";
                status = "disabled";
        };
@@ -715,7 +715,7 @@
                #pwm-cells = <2>;
                pinctrl-names = "default";
                pinctrl-0 = <&pwm3_pin>;
-               clocks = <&cru PCLK_PWM>;
+               clocks = <&cru PCLK_RKPWM>;
                clock-names = "pwm";
                status = "disabled";
        };