spi: dw: Discard DW SSI chip type storages

Keeping SPI peripheral devices type is pointless since first it hasn't
been functionally utilized by any of the client drivers/code and second it
won't work for Microwire type at the very least. Moreover there is no
point in setting up the type by means of the chip-data in the modern
kernel. The peripheral devices with specific interface type need to be
detected in order to activate the corresponding frame format. It most
likely will require some peripheral device specific DT property or
whatever to find out the interface protocol. So let's remove the serial
interface type fields from the DW APB SSI controller and the SPI
peripheral device private data.

Note we'll preserve the explicit SSI_MOTO_SPI interface type setting up to
signify the only currently supported interface protocol.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Link: https://lore.kernel.org/r/20200920112914.26501-9-Sergey.Semin@baikalelectronics.ru
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 7a75068037e7c5addda30ba5378be465508a2ab8..cbb65d3ea13e4b08a7a4f518ff4a1d4cb9ffe7a0 100644 (file)
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -23,7 +23,6 @@
 /* Slave spi_dev related */
 struct chip_data {
        u8 tmode;               /* TR/TO/RO/EEPROM */
-       u8 type;                /* SPI/SSP/MicroWire */
 
        u16 clk_div;            /* baud rate divider */
        u32 speed_hz;           /* baud rate */
@@ -244,7 +243,7 @@ u32 dw_spi_update_cr0(struct spi_controller *master, struct spi_device *spi,
 
        /* Default SPI mode is SCPOL = 0, SCPH = 0 */
        cr0 = (transfer->bits_per_word - 1)
-               | (chip->type << SPI_FRF_OFFSET)
+               | (SSI_MOTO_SPI << SPI_FRF_OFFSET)
                | ((((spi->mode & SPI_CPOL) ? 1 : 0) << SPI_SCOL_OFFSET) |
                   (((spi->mode & SPI_CPHA) ? 1 : 0) << SPI_SCPH_OFFSET) |
                   (((spi->mode & SPI_LOOP) ? 1 : 0) << SPI_SRL_OFFSET))
@@ -266,7 +265,7 @@ u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master,
        cr0 = (transfer->bits_per_word - 1);
 
        /* CTRLR0[ 7: 6] Frame Format */
-       cr0 |= chip->type << DWC_SSI_CTRLR0_FRF_OFFSET;
+       cr0 |= SSI_MOTO_SPI << DWC_SSI_CTRLR0_FRF_OFFSET;
 
        /*
         * SPI mode (SCPOL|SCPH)
@@ -462,7 +461,6 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
                return -ENOMEM;
 
        dws->master = master;
-       dws->type = SSI_MOTO_SPI;
        dws->dma_addr = (dma_addr_t)(dws->paddr + DW_SPI_DR);
        spin_lock_init(&dws->buf_lock);
 

diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 40b2c8c0c2a292d14fb67e8701fa7d80daa5f94e..66ef35dd8b6e1ca47081add2ac665409fbd45d33 100644 (file)
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -111,7 +111,6 @@ struct dw_spi_dma_ops {
 
 struct dw_spi {
        struct spi_controller   *master;
-       enum dw_ssi_type        type;
 
        void __iomem            *regs;
        unsigned long           paddr;