scsi: ufs: host: mediatek: Set IRQ affinity policy for MCQ mode

Set the IRQ affinity for MCQ mode to improve performance. Specifically,
it migrates the IRQ from CPU0 to CPU3 to enhance IRQ handling efficiency.

Setting IRQ affinity directly from the kernel allows the configuration to
take effect earlier, and provides greater security and consistency,
especially important for systems with strict performanceor real-time
requirements.

Signed-off-by: Peter Wang <peter.wang@mediatek.com>
Link: https://lore.kernel.org/r/20250722030841.1998783-6-peter.wang@mediatek.com
Reviewed-by: Chun-Hung Wu <chun-hung.wu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 112056e5d8e0213221d8f879f91e61c65b64e3aa..78eaf057cdc3b8289cca839eb970bad5aec60034 100644 (file)
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -798,6 +798,46 @@ static int ufs_mtk_setup_clocks(struct ufs_hba *hba, bool on,
        return ret;
 }
 
+static u32 ufs_mtk_mcq_get_irq(struct ufs_hba *hba, unsigned int cpu)
+{
+       struct ufs_mtk_host *host = ufshcd_get_variant(hba);
+       struct blk_mq_tag_set *tag_set = &hba->host->tag_set;
+       struct blk_mq_queue_map *map = &tag_set->map[HCTX_TYPE_DEFAULT];
+       unsigned int nr = map->nr_queues;
+       unsigned int q_index;
+
+       q_index = map->mq_map[cpu];
+       if (q_index > nr) {
+               dev_err(hba->dev, "hwq index %d exceed %d\n",
+                       q_index, nr);
+               return MTK_MCQ_INVALID_IRQ;
+       }
+
+       return host->mcq_intr_info[q_index].irq;
+}
+
+static void ufs_mtk_mcq_set_irq_affinity(struct ufs_hba *hba, unsigned int cpu)
+{
+       unsigned int irq, _cpu;
+       int ret;
+
+       irq = ufs_mtk_mcq_get_irq(hba, cpu);
+       if (irq == MTK_MCQ_INVALID_IRQ) {
+               dev_err(hba->dev, "invalid irq. unable to bind irq to cpu%d", cpu);
+               return;
+       }
+
+       /* force migrate irq of cpu0 to cpu3 */
+       _cpu = (cpu == 0) ? 3 : cpu;
+       ret = irq_set_affinity(irq, cpumask_of(_cpu));
+       if (ret) {
+               dev_err(hba->dev, "set irq %d affinity to CPU %d failed\n",
+                       irq, _cpu);
+               return;
+       }
+       dev_info(hba->dev, "set irq %d affinity to CPU: %d\n", irq, _cpu);
+}
+
 static void ufs_mtk_get_controller_version(struct ufs_hba *hba)
 {
        struct ufs_mtk_host *host = ufshcd_get_variant(hba);
@@ -1527,6 +1567,13 @@ static int ufs_mtk_apply_dev_quirks(struct ufs_hba *hba)
 {
        struct ufs_dev_info *dev_info = &hba->dev_info;
        u16 mid = dev_info->wmanufacturerid;
+       unsigned int cpu;
+
+       if (hba->mcq_enabled) {
+               /* Iterate all cpus to set affinity for mcq irqs */
+               for (cpu = 0; cpu < nr_cpu_ids; cpu++)
+                       ufs_mtk_mcq_set_irq_affinity(hba, cpu);
+       }
 
        if (mid == UFS_VENDOR_SAMSUNG) {
                ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 6);