RSND_GEN_S_REG(SSI_SYS_STATUS5, 0x884),
                RSND_GEN_S_REG(SSI_SYS_STATUS6, 0x888),
                RSND_GEN_S_REG(SSI_SYS_STATUS7, 0x88c),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE0, 0x850),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE1, 0x854),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE2, 0x858),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE3, 0x85c),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE4, 0x890),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE5, 0x894),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE6, 0x898),
+               RSND_GEN_S_REG(SSI_SYS_INT_ENABLE7, 0x89c),
                RSND_GEN_S_REG(HDMI0_SEL,       0x9e0),
                RSND_GEN_S_REG(HDMI1_SEL,       0x9e4),
 
 
        u32 wsr         = ssi->wsr;
        int width;
        int is_tdm, is_tdm_split;
+       int id = rsnd_mod_id(mod);
+       int i;
+       u32 sys_int_enable = 0;
 
        is_tdm          = rsnd_runtime_is_tdm(io);
        is_tdm_split    = rsnd_runtime_is_tdm_split(io);
                cr_mode = DIEN;         /* PIO : enable Data interrupt */
        }
 
+       /* enable busif buffer over/under run interrupt. */
+       if (is_tdm || is_tdm_split) {
+               switch (id) {
+               case 0:
+               case 1:
+               case 2:
+               case 3:
+               case 4:
+                       for (i = 0; i < 4; i++) {
+                               sys_int_enable = rsnd_mod_read(mod,
+                                       SSI_SYS_INT_ENABLE(i * 2));
+                               sys_int_enable |= 0xf << (id * 4);
+                               rsnd_mod_write(mod,
+                                              SSI_SYS_INT_ENABLE(i * 2),
+                                              sys_int_enable);
+                       }
+
+                       break;
+               case 9:
+                       for (i = 0; i < 4; i++) {
+                               sys_int_enable = rsnd_mod_read(mod,
+                                       SSI_SYS_INT_ENABLE((i * 2) + 1));
+                               sys_int_enable |= 0xf << 4;
+                               rsnd_mod_write(mod,
+                                              SSI_SYS_INT_ENABLE((i * 2) + 1),
+                                              sys_int_enable);
+                       }
+
+                       break;
+               }
+       }
+
 init_end:
        ssi->cr_own     = cr_own;
        ssi->cr_mode    = cr_mode;
 {
        struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
        struct device *dev = rsnd_priv_to_dev(priv);
+       int is_tdm, is_tdm_split;
+       int id = rsnd_mod_id(mod);
+       int i;
+       u32 sys_int_enable = 0;
+
+       is_tdm          = rsnd_runtime_is_tdm(io);
+       is_tdm_split    = rsnd_runtime_is_tdm_split(io);
 
        if (!rsnd_ssi_is_run_mods(mod, io))
                return 0;
                ssi->wsr        = 0;
        }
 
+       /* disable busif buffer over/under run interrupt. */
+       if (is_tdm || is_tdm_split) {
+               switch (id) {
+               case 0:
+               case 1:
+               case 2:
+               case 3:
+               case 4:
+                       for (i = 0; i < 4; i++) {
+                               sys_int_enable = rsnd_mod_read(mod,
+                                               SSI_SYS_INT_ENABLE(i * 2));
+                               sys_int_enable &= ~(0xf << (id * 4));
+                               rsnd_mod_write(mod,
+                                              SSI_SYS_INT_ENABLE(i * 2),
+                                              sys_int_enable);
+                       }
+
+                       break;
+               case 9:
+                       for (i = 0; i < 4; i++) {
+                               sys_int_enable = rsnd_mod_read(mod,
+                                       SSI_SYS_INT_ENABLE((i * 2) + 1));
+                               sys_int_enable &= ~(0xf << 4);
+                               rsnd_mod_write(mod,
+                                              SSI_SYS_INT_ENABLE((i * 2) + 1),
+                                              sys_int_enable);
+                       }
+
+                       break;
+               }
+       }
+
        return 0;
 }
 
                        int enable)
 {
        u32 val = 0;
+       int is_tdm, is_tdm_split;
+       int id = rsnd_mod_id(mod);
+
+       is_tdm          = rsnd_runtime_is_tdm(io);
+       is_tdm_split    = rsnd_runtime_is_tdm_split(io);
 
        if (rsnd_is_gen1(priv))
                return 0;
        if (enable)
                val = rsnd_ssi_is_dma_mode(mod) ? 0x0e000000 : 0x0f000000;
 
+       if (is_tdm || is_tdm_split) {
+               switch (id) {
+               case 0:
+               case 1:
+               case 2:
+               case 3:
+               case 4:
+               case 9:
+                       val |= 0x0000ff00;
+                       break;
+               }
+       }
+
        rsnd_mod_write(mod, SSI_INT_ENABLE, val);
 
        return 0;
        u32 status;
        bool elapsed = false;
        bool stop = false;
+       int id = rsnd_mod_id(mod);
+       int i;
+       int is_tdm, is_tdm_split;
+
+       is_tdm          = rsnd_runtime_is_tdm(io);
+       is_tdm_split    = rsnd_runtime_is_tdm_split(io);
 
        spin_lock(&priv->lock);
 
                stop = true;
        }
 
+       status = 0;
+
+       if (is_tdm || is_tdm_split) {
+               switch (id) {
+               case 0:
+               case 1:
+               case 2:
+               case 3:
+               case 4:
+                       for (i = 0; i < 4; i++) {
+                               status = rsnd_mod_read(mod,
+                                                      SSI_SYS_STATUS(i * 2));
+                               status &= 0xf << (id * 4);
+
+                               if (status) {
+                                       rsnd_dbg_irq_status(dev,
+                                               "%s err status : 0x%08x\n",
+                                               rsnd_mod_name(mod), status);
+                                       rsnd_mod_write(mod,
+                                                      SSI_SYS_STATUS(i * 2),
+                                                      0xf << (id * 4));
+                                       stop = true;
+                                       break;
+                               }
+                       }
+                       break;
+               case 9:
+                       for (i = 0; i < 4; i++) {
+                               status = rsnd_mod_read(mod,
+                                               SSI_SYS_STATUS((i * 2) + 1));
+                               status &= 0xf << 4;
+
+                               if (status) {
+                                       rsnd_dbg_irq_status(dev,
+                                               "%s err status : 0x%08x\n",
+                                               rsnd_mod_name(mod), status);
+                                       rsnd_mod_write(mod,
+                                               SSI_SYS_STATUS((i * 2) + 1),
+                                               0xf << 4);
+                                       stop = true;
+                                       break;
+                               }
+                       }
+                       break;
+               }
+       }
+
        rsnd_ssi_status_clear(mod);
 rsnd_ssi_interrupt_out:
        spin_unlock(&priv->lock);