gpu: Bulk conversion to generic_handle_domain_irq()

Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 83af307e97cdf2f0f81310ac14e7325e649ebc89..cd2e18f072fc9292a5cb2e75f9e99a334dc39ebe 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -502,7 +502,7 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
 
        } else if ((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) &&
                   adev->irq.virq[src_id]) {
-               generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
+               generic_handle_domain_irq(adev->irq.domain, src_id);
 
        } else if (!adev->irq.client[client_id].sources) {
                DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
index 6b0a7bc87eb75b879d765756e07f5cc6deac1eff..b466784d982236bba983e8c0e1321665288fbbae 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
@@ -45,20 +45,13 @@ static void dpu_mdss_irq(struct irq_desc *desc)
 
        while (interrupts) {
                irq_hw_number_t hwirq = fls(interrupts) - 1;
-               unsigned int mapping;
                int rc;
 
-               mapping = irq_find_mapping(dpu_mdss->irq_controller.domain,
-                                          hwirq);
-               if (mapping == 0) {
-                       DRM_ERROR("couldn't find irq mapping for %lu\n", hwirq);
-                       break;
-               }
-
-               rc = generic_handle_irq(mapping);
+               rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
+                                              hwirq);
                if (rc < 0) {
-                       DRM_ERROR("handle irq fail: irq=%lu mapping=%u rc=%d\n",
-                                 hwirq, mapping, rc);
+                       DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
+                                 hwirq, rc);
                        break;
                }
 

diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
index 09bd46ad820bd2b4af1026f6eeb7ff7c4f54791e..2f4895bcb0b00ed05590b4a874827fe2f4abe784 100644 (file)
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
@@ -50,8 +50,7 @@ static irqreturn_t mdss_irq(int irq, void *arg)
        while (intr) {
                irq_hw_number_t hwirq = fls(intr) - 1;
 
-               generic_handle_irq(irq_find_mapping(
-                               mdp5_mdss->irqcontroller.domain, hwirq));
+               generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
                intr &= ~(1 << hwirq);
        }
 

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index d166ee262ce4390f0987d07e589aebe59f25bd5e..118318513e2d2a747c313a2e7d89bb485a1ac9f7 100644 (file)
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -1003,19 +1003,16 @@ err_cpmem:
 static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs)
 {
        unsigned long status;
-       int i, bit, irq;
+       int i, bit;
 
        for (i = 0; i < num_regs; i++) {
 
                status = ipu_cm_read(ipu, IPU_INT_STAT(regs[i]));
                status &= ipu_cm_read(ipu, IPU_INT_CTRL(regs[i]));
 
-               for_each_set_bit(bit, &status, 32) {
-                       irq = irq_linear_revmap(ipu->domain,
-                                               regs[i] * 32 + bit);
-                       if (irq)
-                               generic_handle_irq(irq);
-               }
+               for_each_set_bit(bit, &status, 32)
+                       generic_handle_domain_irq(ipu->domain,
+                                                 regs[i] * 32 + bit);
        }
 }