drm/amd/display: Allocate DCN35 clock table transfer buffers in GART

[Why]
Request from PMFW to use GART for clock table transfer tables as
framebuffer is being deprecated on APU.

[How]
Switch over to GART via the allocation flag.

Reviewed-by: Sung joon Kim <sungjoon.kim@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Zaeem Mohamed <zaeem.mohamed@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
index 0ce9b40dfc68d923ce719703b1782a1849b75880..f50054089da744ff1c503a0cd6bda34f908b0cfa 100644 (file)
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
@@ -1100,7 +1100,7 @@ void dcn35_clk_mgr_construct(
 
        clk_mgr->smu_wm_set.wm_set = (struct dcn35_watermarks *)dm_helpers_allocate_gpu_mem(
                                clk_mgr->base.base.ctx,
-                               DC_MEM_ALLOC_TYPE_FRAME_BUFFER,
+                               DC_MEM_ALLOC_TYPE_GART,
                                sizeof(struct dcn35_watermarks),
                                &clk_mgr->smu_wm_set.mc_address.quad_part);
 
@@ -1112,7 +1112,7 @@ void dcn35_clk_mgr_construct(
 
        smu_dpm_clks.dpm_clks = (DpmClocks_t_dcn35 *)dm_helpers_allocate_gpu_mem(
                                clk_mgr->base.base.ctx,
-                               DC_MEM_ALLOC_TYPE_FRAME_BUFFER,
+                               DC_MEM_ALLOC_TYPE_GART,
                                sizeof(DpmClocks_t_dcn35),
                                &smu_dpm_clks.mc_address.quad_part);
 
@@ -1209,7 +1209,7 @@ void dcn35_clk_mgr_construct(
        }
 
        if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0)
-               dm_helpers_free_gpu_mem(clk_mgr->base.base.ctx, DC_MEM_ALLOC_TYPE_FRAME_BUFFER,
+               dm_helpers_free_gpu_mem(clk_mgr->base.base.ctx, DC_MEM_ALLOC_TYPE_GART,
                                smu_dpm_clks.dpm_clks);
 
        if (ctx->dc->config.disable_ips != DMUB_IPS_DISABLE_ALL) {