if (divider->lock)
                spin_lock_irqsave(divider->lock, flags);
+       else
+               __acquire(divider->lock);
 
        if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
                val = div_mask(divider->width) << (divider->shift + 16);
 
        if (divider->lock)
                spin_unlock_irqrestore(divider->lock, flags);
+       else
+               __release(divider->lock);
 
        return 0;
 }
 
 
        if (fd->lock)
                spin_lock_irqsave(fd->lock, flags);
+       else
+               __acquire(fd->lock);
 
        val = clk_readl(fd->reg);
 
        if (fd->lock)
                spin_unlock_irqrestore(fd->lock, flags);
+       else
+               __release(fd->lock);
 
        m = (val & fd->mmask) >> fd->mshift;
        n = (val & fd->nmask) >> fd->nshift;
 
        if (fd->lock)
                spin_lock_irqsave(fd->lock, flags);
+       else
+               __acquire(fd->lock);
 
        val = clk_readl(fd->reg);
        val &= ~(fd->mmask | fd->nmask);
 
        if (fd->lock)
                spin_unlock_irqrestore(fd->lock, flags);
+       else
+               __release(fd->lock);
 
        return 0;
 }
 
 
        if (gate->lock)
                spin_lock_irqsave(gate->lock, flags);
+       else
+               __acquire(gate->lock);
 
        if (gate->flags & CLK_GATE_HIWORD_MASK) {
                reg = BIT(gate->bit_idx + 16);
 
        if (gate->lock)
                spin_unlock_irqrestore(gate->lock, flags);
+       else
+               __release(gate->lock);
 }
 
 static int clk_gate_enable(struct clk_hw *hw)
 
 
        if (mux->lock)
                spin_lock_irqsave(mux->lock, flags);
+       else
+               __acquire(mux->lock);
 
        if (mux->flags & CLK_MUX_HIWORD_MASK) {
                val = mux->mask << (mux->shift + 16);
 
        if (mux->lock)
                spin_unlock_irqrestore(mux->lock, flags);
+       else
+               __release(mux->lock);
 
        return 0;
 }