}
 
                pdata->set_timer_src = omap1_dm_timer_set_src;
-               pdata->needs_manual_reset = 1;
-               pdata->timer_capability = OMAP_TIMER_ALWON;
+               pdata->timer_capability = OMAP_TIMER_ALWON |
+                               OMAP_TIMER_NEEDS_RESET;
 
                ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
                if (ret) {
 
 
 int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
-       struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
        int ret;
 
        timer->fclk = clk_get(&timer->pdev->dev, "fck");
                return -EINVAL;
        }
 
-       if (pdata->needs_manual_reset)
+       if (timer->capability & OMAP_TIMER_NEEDS_RESET)
                omap_dm_timer_reset(timer);
 
        ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
 int omap_dm_timer_stop(struct omap_dm_timer *timer)
 {
        unsigned long rate = 0;
-       struct dmtimer_platform_data *pdata;
 
        if (unlikely(!timer))
                return -EINVAL;
 
-       pdata = timer->pdev->dev.platform_data;
-       if (!pdata->needs_manual_reset)
+       if (!(timer->capability & OMAP_TIMER_NEEDS_RESET))
                rate = clk_get_rate(timer->fclk);
 
        __omap_dm_timer_stop(timer, timer->posted, rate);
        timer->capability = pdata->timer_capability;
 
        /* Skip pm_runtime_enable for OMAP1 */
-       if (!pdata->needs_manual_reset) {
+       if (!(timer->capability & OMAP_TIMER_NEEDS_RESET)) {
                pm_runtime_enable(&pdev->dev);
                pm_runtime_irq_safe(&pdev->dev);
        }
 
 #define OMAP_TIMER_SECURE                              0x80000000
 #define OMAP_TIMER_ALWON                               0x40000000
 #define OMAP_TIMER_HAS_PWM                             0x20000000
+#define OMAP_TIMER_NEEDS_RESET                         0x10000000
 
 struct omap_timer_capability_dev_attr {
        u32 timer_capability;
 
 struct dmtimer_platform_data {
        int (*set_timer_src)(struct platform_device *pdev, int source);
-       u32 needs_manual_reset:1;
        u32 timer_capability;
 };