drm/i915/tgl: Wa_1409420604

Avoid possible hang in CPSS unit.

Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191015154449.10338-6-mika.kuoppala@linux.intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index bc5fdb4e47b19827b90b74dd39769407037c873c..7fea61b00b9960cfb0099a0f703d39e894f8eed8 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -902,6 +902,11 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 static void
 tgl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
 {
+       /* Wa_1409420604:tgl */
+       if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0))
+               wa_write_or(wal,
+                           SUBSLICE_UNIT_LEVEL_CLKGATE2,
+                           CPSSUNIT_CLKGATE_DIS);
 }
 
 static void

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 4b58861b5114443013a42cbd67678cbe0e90fc1e..449648a28a67c439d5063a545adb7ae3c64c7408 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4056,6 +4056,9 @@ enum {
 #define SUBSLICE_UNIT_LEVEL_CLKGATE    _MMIO(0x9524)
 #define  GWUNIT_CLKGATE_DIS            (1 << 16)
 
+#define SUBSLICE_UNIT_LEVEL_CLKGATE2   _MMIO(0x9528)
+#define  CPSSUNIT_CLKGATE_DIS          REG_BIT(9)
+
 #define UNSLICE_UNIT_LEVEL_CLKGATE     _MMIO(0x9434)
 #define  VFUNIT_CLKGATE_DIS            (1 << 20)