clk: samsung: Don't pass reg_base to samsung_clk_register_pll()

Base address can be derived from context structure. Remove `base'
argument from samsung_clk_register_pll() and use `ctx->reg_base'
instead, as it's done in other clock registering functions.

No functional change.

Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223041938.22732-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 7756b21e892549a03dd0735dcfde5a9de5838c26..7a9994144d72924bf781a70b6667b89a0c6562c3 100644 (file)
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -1276,7 +1276,7 @@ static void __init exynos4_clk_init(struct device_node *np,
                                                        exynos4210_vpll_rates;
 
                samsung_clk_register_pll(ctx, exynos4210_plls,
-                                       ARRAY_SIZE(exynos4210_plls), reg_base);
+                                       ARRAY_SIZE(exynos4210_plls));
        } else {
                if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24000000) {
                        exynos4x12_plls[apll].rate_table =
@@ -1288,7 +1288,7 @@ static void __init exynos4_clk_init(struct device_node *np,
                }
 
                samsung_clk_register_pll(ctx, exynos4x12_plls,
-                                       ARRAY_SIZE(exynos4x12_plls), reg_base);
+                                       ARRAY_SIZE(exynos4x12_plls));
        }
 
        samsung_clk_register_fixed_rate(ctx, exynos4_fixed_rate_clks,

diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c
index e77e455466f98215062561407b9bdaa1e56cc3ab..f1cb69aea10e8b04b42f85480de5ee55e6550001 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5250.c
+++ b/drivers/clk/samsung/clk-exynos5250.c
@@ -815,8 +815,7 @@ static void __init exynos5250_clk_init(struct device_node *np)
                exynos5250_plls[vpll].rate_table =  vpll_24mhz_tbl;
 
        samsung_clk_register_pll(ctx, exynos5250_plls,
-                       ARRAY_SIZE(exynos5250_plls),
-                       reg_base);
+                       ARRAY_SIZE(exynos5250_plls));
        samsung_clk_register_fixed_rate(ctx, exynos5250_fixed_rate_clks,
                        ARRAY_SIZE(exynos5250_fixed_rate_clks));
        samsung_clk_register_fixed_factor(ctx, exynos5250_fixed_factor_clks,

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index 27b1c5d56bb36689cadad1c72e13f1df40a3572b..46cac4980be2c6f1422dcbe3a59f6ced1c21137f 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c
@@ -1606,8 +1606,7 @@ static void __init exynos5x_clk_init(struct device_node *np,
        else
                exynos5x_plls[bpll].rate_table = exynos5422_bpll_rate_table;
 
-       samsung_clk_register_pll(ctx, exynos5x_plls, ARRAY_SIZE(exynos5x_plls),
-                                       reg_base);
+       samsung_clk_register_pll(ctx, exynos5x_plls, ARRAY_SIZE(exynos5x_plls));
        samsung_clk_register_fixed_rate(ctx, exynos5x_fixed_rate_clks,
                        ARRAY_SIZE(exynos5x_fixed_rate_clks));
        samsung_clk_register_fixed_factor(ctx, exynos5x_fixed_factor_clks,

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index f9daae20f393de765fa8e2b30e3891fea530ddbf..eb72bf2aaee8fd66965d97a9daa45b5e9163eeac 100644 (file)
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -5610,8 +5610,8 @@ static int __init exynos5433_cmu_probe(struct platform_device *pdev)
        pm_runtime_enable(dev);
 
        if (info->pll_clks)
-               samsung_clk_register_pll(ctx, info->pll_clks, info->nr_pll_clks,
-                                        reg_base);
+               samsung_clk_register_pll(ctx, info->pll_clks,
+                                        info->nr_pll_clks);
        if (info->mux_clks)
                samsung_clk_register_mux(ctx, info->mux_clks,
                                         info->nr_mux_clks);

diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
index df7812371d709c6d09706ef59ef462d69e9a27b0..5ceac4c25c1cb4dc22dd51a93ecbcea55868379e 100644 (file)
--- a/drivers/clk/samsung/clk-pll.c
+++ b/drivers/clk/samsung/clk-pll.c
@@ -1259,8 +1259,7 @@ static const struct clk_ops samsung_pll2650xx_clk_min_ops = {
 };
 
 static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
-                               const struct samsung_pll_clock *pll_clk,
-                               void __iomem *base)
+                               const struct samsung_pll_clock *pll_clk)
 {
        struct samsung_clk_pll *pll;
        struct clk_init_data init;
@@ -1395,8 +1394,8 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
 
        pll->hw.init = &init;
        pll->type = pll_clk->type;
-       pll->lock_reg = base + pll_clk->lock_offset;
-       pll->con_reg = base + pll_clk->con_offset;
+       pll->lock_reg = ctx->reg_base + pll_clk->lock_offset;
+       pll->con_reg = ctx->reg_base + pll_clk->con_offset;
 
        ret = clk_hw_register(ctx->dev, &pll->hw);
        if (ret) {
@@ -1412,10 +1411,10 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx,
 
 void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx,
                        const struct samsung_pll_clock *pll_list,
-                       unsigned int nr_pll, void __iomem *base)
+                       unsigned int nr_pll)
 {
        int cnt;
 
        for (cnt = 0; cnt < nr_pll; cnt++)
-               _samsung_clk_register_pll(ctx, &pll_list[cnt], base);
+               _samsung_clk_register_pll(ctx, &pll_list[cnt]);
 }

diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c
index 772f776572a1d49051b74c3c7e37a6283e9f87d0..47e9d19486dcdef962a452419cdf90cbdc5934c8 100644 (file)
--- a/drivers/clk/samsung/clk-s3c64xx.c
+++ b/drivers/clk/samsung/clk-s3c64xx.c
@@ -414,7 +414,7 @@ void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f,
 
        /* Register PLLs. */
        samsung_clk_register_pll(ctx, s3c64xx_pll_clks,
-                               ARRAY_SIZE(s3c64xx_pll_clks), reg_base);
+                               ARRAY_SIZE(s3c64xx_pll_clks));
 
        /* Register common internal clocks. */
        samsung_clk_register_fixed_rate(ctx, s3c64xx_fixed_rate_clks,

diff --git a/drivers/clk/samsung/clk-s5pv210.c b/drivers/clk/samsung/clk-s5pv210.c
index b3e9f775ffdb02374a158c3b64ab2cb9595db15e..b0ab6bc9d21d0f964044c1d446fccab4d9db7529 100644 (file)
--- a/drivers/clk/samsung/clk-s5pv210.c
+++ b/drivers/clk/samsung/clk-s5pv210.c
@@ -753,7 +753,7 @@ static void __init __s5pv210_clk_init(struct device_node *np,
                samsung_clk_register_fixed_rate(ctx, s5p6442_frate_clks,
                        ARRAY_SIZE(s5p6442_frate_clks));
                samsung_clk_register_pll(ctx, s5p6442_pll_clks,
-                       ARRAY_SIZE(s5p6442_pll_clks), reg_base);
+                       ARRAY_SIZE(s5p6442_pll_clks));
                samsung_clk_register_mux(ctx, s5p6442_mux_clks,
                                ARRAY_SIZE(s5p6442_mux_clks));
                samsung_clk_register_div(ctx, s5p6442_div_clks,
@@ -764,7 +764,7 @@ static void __init __s5pv210_clk_init(struct device_node *np,
                samsung_clk_register_fixed_rate(ctx, s5pv210_frate_clks,
                        ARRAY_SIZE(s5pv210_frate_clks));
                samsung_clk_register_pll(ctx, s5pv210_pll_clks,
-                       ARRAY_SIZE(s5pv210_pll_clks), reg_base);
+                       ARRAY_SIZE(s5pv210_pll_clks));
                samsung_clk_register_mux(ctx, s5pv210_mux_clks,
                                ARRAY_SIZE(s5pv210_mux_clks));
                samsung_clk_register_div(ctx, s5pv210_div_clks,

diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index c2758f4175a1176c5046e81a2711f0279170ae9f..2436223aac1a8a2e4a4bedb1037f50fd9872bbd8 100644 (file)
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -344,8 +344,7 @@ struct samsung_clk_provider * __init samsung_cmu_register_one(
        ctx = samsung_clk_init(reg_base, cmu->nr_clk_ids);
 
        if (cmu->pll_clks)
-               samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
-                       reg_base);
+               samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks);
        if (cmu->mux_clks)
                samsung_clk_register_mux(ctx, cmu->mux_clks,
                        cmu->nr_mux_clks);

diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 475f1d28cca61dd17750d4c10ab3d25fd42c6044..98753b0e5055eb002cf696d0c334d8be889f48d4 100644 (file)
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -372,7 +372,7 @@ void samsung_clk_register_gate(struct samsung_clk_provider *ctx,
                        unsigned int nr_clk);
 void samsung_clk_register_pll(struct samsung_clk_provider *ctx,
                        const struct samsung_pll_clock *pll_list,
-                       unsigned int nr_clk, void __iomem *base);
+                       unsigned int nr_clk);
 void samsung_clk_register_cpu(struct samsung_clk_provider *ctx,
                const struct samsung_cpu_clock *list, unsigned int nr_clk);