arm64: dts: exynos: gs101: align poweroff writes with downstream

For power off, downstream only clears bit 8 and leaves all other bits
untouched, whereas this here ends up setting bit 8 and clearing all
others, due to how sysconf-poweroff parses the DT.

I noticed this discrepancy while debugging some reboot related
differences between up- and downstream and it's useful to align the
behaviour here.

Note: for reboot downstream seems to be incorrectly writing 0x00000002
and not just setting bit 1 (which is the only R/W bit in this
register), so we keep that one as-is here.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20250210-gs101-renppt-dts-v2-2-fb33fda6fc4b@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index e78dcd506a5cc025e21ee6a8cedc00fad03c7df1..86741994bb7c55bdcb38e4c8924d3f714a3f8d3c 100644 (file)
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -1401,7 +1401,8 @@
                        poweroff: syscon-poweroff {
                                compatible = "syscon-poweroff";
                                offset = <0x3e9c>; /* PAD_CTRL_PWR_HOLD */
-                               mask = <0x100>; /* reset value */
+                               mask = <0x00000100>;
+                               value = <0x0>;
                        };
 
                        reboot: syscon-reboot {