drm/amd/vcn: Add late_init callback for VCN v4.0.3 reset handling

This change reorganizes VCN reset capability detection by:

1. Moving reset mask configuration from sw_init to new late_init phase
2. Adding vcn_v4_0_3_late_init() to properly check for per-queue reset support
3. Only setting soft full reset mask as fallback when per-queue reset isn't supported
4. Removing TODO comment now that queue reset support is implemented

V2: Removed unrelated changes. Keep amdgpu_get_soft_full_reset_mask in place
    and remove TODO comment. (Alex)
v3: set the flags at one place (all in late_init) (Lijo)

Suggested-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Ruili Ji <ruiliji2@amd.com>
Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index 019bd362edb22c7cedc3fa056df9e1dd16571c24..a63a1e3435ab609e33fb3684c7c27a344cecf9a3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
@@ -134,6 +134,19 @@ static int vcn_v4_0_3_early_init(struct amdgpu_ip_block *ip_block)
        return 0;
 }
 
+static int vcn_v4_0_3_late_init(struct amdgpu_ip_block *ip_block)
+{
+       struct amdgpu_device *adev = ip_block->adev;
+
+       adev->vcn.supported_reset =
+               amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
+
+       if (amdgpu_dpm_reset_vcn_is_supported(adev))
+               adev->vcn.supported_reset |= AMDGPU_RESET_TYPE_PER_QUEUE;
+
+       return 0;
+}
+
 static int vcn_v4_0_3_fw_shared_init(struct amdgpu_device *adev, int inst_idx)
 {
        struct amdgpu_vcn4_fw_shared *fw_shared;
@@ -211,10 +224,6 @@ static int vcn_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block)
                        adev->vcn.inst[i].pause_dpg_mode = vcn_v4_0_3_pause_dpg_mode;
        }
 
-       /* TODO: Add queue reset mask when FW fully supports it */
-       adev->vcn.supported_reset =
-               amdgpu_get_soft_full_reset_mask(&adev->vcn.inst[0].ring_enc[0]);
-
        if (amdgpu_sriov_vf(adev)) {
                r = amdgpu_virt_alloc_mm_table(adev);
                if (r)
@@ -1871,6 +1880,7 @@ static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev)
 static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {
        .name = "vcn_v4_0_3",
        .early_init = vcn_v4_0_3_early_init,
+       .late_init = vcn_v4_0_3_late_init,
        .sw_init = vcn_v4_0_3_sw_init,
        .sw_fini = vcn_v4_0_3_sw_fini,
        .hw_init = vcn_v4_0_3_hw_init,