ath9k_hw: move LowPower array writes to ar9003_hw_configpcipowersave()

The LowPower array writes disables the PLL when ASPM is enabled.
The host driver makes quite a few calls to ath9k_hw_configpcipowersave()
and these same calls also need to ensure the PLL is off when they issue
it.

Cc: Aeolus Yang <aeolus.yang@atheros.com>
Cc: Madhan Jaganathan <madhan.jaganathan@atheros.com>
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index b4a9441a5ac7fd31024a4922e38dbbc4f90310cc..efabab8d50c9f639dd41c20e193335de71b00740 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -298,6 +298,20 @@ static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
                else
                        REG_WRITE(ah, AR_WA, ah->WARegVal);
        }
+
+       /*
+        * Configire PCIE after Ini init. SERDES values now come from ini file
+        * This enables PCIe low power mode.
+        */
+       if (AR_SREV_9300_20_OR_LATER(ah)) {
+               unsigned int i;
+
+               for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) {
+                       REG_WRITE(ah,
+                                 INI_RA(&ah->iniPcieSerdesLowPower, i, 0),
+                                 INI_RA(&ah->iniPcieSerdesLowPower, i, 1));
+               }
+       }
 }
 
 /* Sets up the AR9003 hardware familiy callbacks */

diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index fb09042e2889aaed4bf7ea01bf641cdf6c140a2d..3ee7d4e0499f80ceeffc76ed9724bd9113db6514 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -570,20 +570,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
 
        ath9k_hw_init_mode_regs(ah);
 
-       /*
-        * Configire PCIE after Ini init. SERDES values now come from ini file
-        * This enables PCIe low power mode.
-        */
-       if (AR_SREV_9300_20_OR_LATER(ah)) {
-               unsigned int i;
-
-               for (i = 0; i < ah->iniPcieSerdesLowPower.ia_rows; i++) {
-                       REG_WRITE(ah,
-                                 INI_RA(&ah->iniPcieSerdesLowPower, i, 0),
-                                 INI_RA(&ah->iniPcieSerdesLowPower, i, 1));
-               }
-       }
-
        /*
         * Read back AR_WA into a permanent copy and set bits 14 and 17.
         * We need to do this to avoid RMW of this register. We cannot