if (!(adev->vcn.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
                return -EOPNOTSUPP;
 
-       drm_sched_wqueue_stop(&ring->sched);
+       amdgpu_ring_reset_helper_begin(ring, timedout_fence);
 
        vcn_inst = GET_INST(VCN, ring->me);
        r = amdgpu_dpm_reset_vcn(adev, 1 << vcn_inst);
                adev->vcn.caps |= AMDGPU_VCN_CAPS(RRMT_ENABLED);
        vcn_v4_0_3_hw_init_inst(vinst);
        vcn_v4_0_3_start_dpg_mode(vinst, adev->vcn.inst[ring->me].indirect_sram);
-       r = amdgpu_ring_test_helper(ring);
-       if (r)
-               return r;
-       amdgpu_fence_driver_force_completion(ring);
-       drm_sched_wqueue_start(&ring->sched);
-       return 0;
+
+       return amdgpu_ring_reset_helper_end(ring, timedout_fence);
 }
 
 static const struct amdgpu_ring_funcs vcn_v4_0_3_unified_ring_vm_funcs = {