arm64: dts: qcom: ipq9574: Add nsscc node

Add a node for the nss clock controller found on ipq9574 based devices.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Link: https://lore.kernel.org/r/20250313110359.242491-6-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 769705d398c47f1ed8419a73c4d1061ed1304ed3..db69bff41afacacb5978962e843a9e26b45c299e 100644 (file)
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -1222,6 +1222,35 @@
                        status = "disabled";
                };
 
+               nsscc: clock-controller@39b00000 {
+                       compatible = "qcom,ipq9574-nsscc";
+                       reg = <0x39b00000 0x80000>;
+                       clocks = <&xo_board_clk>,
+                                <&cmn_pll NSS_1200MHZ_CLK>,
+                                <&cmn_pll PPE_353MHZ_CLK>,
+                                <&gcc GPLL0_OUT_AUX>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <0>,
+                                <&gcc GCC_NSSCC_CLK>;
+                       clock-names = "xo",
+                                     "nss_1200",
+                                     "ppe_353",
+                                     "gpll0_out",
+                                     "uniphy0_rx",
+                                     "uniphy0_tx",
+                                     "uniphy1_rx",
+                                     "uniphy1_tx",
+                                     "uniphy2_rx",
+                                     "uniphy2_tx",
+                                     "bus";
+                       #clock-cells = <1>;
+                       #reset-cells = <1>;
+                       #interconnect-cells = <1>;
+               };
        };
 
        thermal-zones {