]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
clk: bm1880: convert from round_rate() to determine_rate()
authorBrian Masney <bmasney@redhat.com>
Mon, 11 Aug 2025 15:19:11 +0000 (11:19 -0400)
committerBrian Masney <bmasney@redhat.com>
Mon, 8 Sep 2025 13:41:30 +0000 (09:41 -0400)
The round_rate() clk ops is deprecated, so migrate this driver from
round_rate() to determine_rate() using the Coccinelle semantic patch
on the cover letter of this series.

Signed-off-by: Brian Masney <bmasney@redhat.com>
drivers/clk/clk-bm1880.c

index 002f7360b1c6c6e3058606a0808115b48fd3147a..dac190bc6e19a6dd4be413ea52d41f74934a1aa9 100644 (file)
@@ -608,8 +608,8 @@ static unsigned long bm1880_clk_div_recalc_rate(struct clk_hw *hw,
        return rate;
 }
 
-static long bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate,
-                                     unsigned long *prate)
+static int bm1880_clk_div_determine_rate(struct clk_hw *hw,
+                                        struct clk_rate_request *req)
 {
        struct bm1880_div_hw_clock *div_hw = to_bm1880_div_clk(hw);
        struct bm1880_div_clock *div = &div_hw->div;
@@ -621,13 +621,18 @@ static long bm1880_clk_div_round_rate(struct clk_hw *hw, unsigned long rate,
                val = readl(reg_addr) >> div->shift;
                val &= clk_div_mask(div->width);
 
-               return divider_ro_round_rate(hw, rate, prate, div->table,
-                                            div->width, div->flags,
-                                            val);
+               req->rate = divider_ro_round_rate(hw, req->rate,
+                                                 &req->best_parent_rate,
+                                                 div->table,
+                                                 div->width, div->flags, val);
+
+               return 0;
        }
 
-       return divider_round_rate(hw, rate, prate, div->table,
-                                 div->width, div->flags);
+       req->rate = divider_round_rate(hw, req->rate, &req->best_parent_rate,
+                                      div->table, div->width, div->flags);
+
+       return 0;
 }
 
 static int bm1880_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -665,7 +670,7 @@ static int bm1880_clk_div_set_rate(struct clk_hw *hw, unsigned long rate,
 
 static const struct clk_ops bm1880_clk_div_ops = {
        .recalc_rate = bm1880_clk_div_recalc_rate,
-       .round_rate = bm1880_clk_div_round_rate,
+       .determine_rate = bm1880_clk_div_determine_rate,
        .set_rate = bm1880_clk_div_set_rate,
 };