spin_unlock(&vop->reg_lock);
 
-       enable_irq(vop->irq);
-
        drm_crtc_vblank_on(crtc);
 
        return 0;
 
        vop_dsp_hold_valid_irq_disable(vop);
 
-       disable_irq(vop->irq);
-
        vop->is_enabled = false;
 
        /*
        uint32_t active_irqs;
        int ret = IRQ_NONE;
 
+       /*
+        * The irq is shared with the iommu. If the runtime-pm state of the
+        * vop-device is disabled the irq has to be targeted at the iommu.
+        */
+       if (!pm_runtime_get_if_in_use(vop->dev))
+               return IRQ_NONE;
+
+       if (vop_core_clks_enable(vop)) {
+               DRM_DEV_ERROR_RATELIMITED(vop->dev, "couldn't enable clocks\n");
+               goto out;
+       }
+
        /*
         * interrupt register has interrupt status, enable and clear bits, we
         * must hold irq_lock to avoid a race with enable/disable_vblank().
 
        /* This is expected for vop iommu irqs, since the irq is shared */
        if (!active_irqs)
-               return IRQ_NONE;
+               goto out_disable;
 
        if (active_irqs & DSP_HOLD_VALID_INTR) {
                complete(&vop->dsp_hold_completion);
                DRM_DEV_ERROR(vop->dev, "Unknown VOP IRQs: %#02x\n",
                              active_irqs);
 
+out_disable:
+       vop_core_clks_disable(vop);
+out:
+       pm_runtime_put(vop->dev);
        return ret;
 }
 
        if (ret)
                goto err_disable_pm_runtime;
 
-       /* IRQ is initially disabled; it gets enabled in power_on */
-       disable_irq(vop->irq);
-
        return 0;
 
 err_disable_pm_runtime: