drm/i915: Use _MMIO_PIPE() for SKL_BOTTOM_COLOR

commit 05ca98523481aa687c5a8dce8939fec539632153 upstream.

No need to use _MMIO_PIPE2() for SKL_BOTTOM_COLOR
since all pipe registers are evenly spread on skl+.
Switch to _MMIO_PIPE() and thus avoid the hidden dev_priv.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221026113906.10551-3-ville.syrjala@linux.intel.com
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 64eacd11b8bff74d3db516dc64ba4761ea3fa32b..2372bfa04aa873bda98eca926f0767d2a79c2d25 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3747,9 +3747,10 @@
 
 /* Skylake+ pipe bottom (background) color */
 #define _SKL_BOTTOM_COLOR_A            0x70034
+#define _SKL_BOTTOM_COLOR_B            0x71034
 #define   SKL_BOTTOM_COLOR_GAMMA_ENABLE                REG_BIT(31)
 #define   SKL_BOTTOM_COLOR_CSC_ENABLE          REG_BIT(30)
-#define SKL_BOTTOM_COLOR(pipe)         _MMIO_PIPE2(pipe, _SKL_BOTTOM_COLOR_A)
+#define SKL_BOTTOM_COLOR(pipe)         _MMIO_PIPE(pipe, _SKL_BOTTOM_COLOR_A, _SKL_BOTTOM_COLOR_B)
 
 #define _ICL_PIPE_A_STATUS                     0x70058
 #define ICL_PIPESTATUS(pipe)                   _MMIO_PIPE2(pipe, _ICL_PIPE_A_STATUS)