* (including the VLAN tag) into the header so we reject anything
         * smaller than that ...
         */
-       fw_hdr_copy_len = sizeof(wr->ethmacdst) + sizeof(wr->ethmacsrc) +
-                         sizeof(wr->ethtype) + sizeof(wr->vlantci);
+       BUILD_BUG_ON(sizeof(wr->firmware) !=
+                    (sizeof(wr->ethmacdst) + sizeof(wr->ethmacsrc) +
+                     sizeof(wr->ethtype) + sizeof(wr->vlantci)));
+       fw_hdr_copy_len = sizeof(wr->firmware);
        ret = cxgb4_validate_skb(skb, dev, fw_hdr_copy_len);
        if (ret)
                goto out_free;
        wr->equiq_to_len16 = cpu_to_be32(wr_mid);
        wr->r3[0] = cpu_to_be32(0);
        wr->r3[1] = cpu_to_be32(0);
-       skb_copy_from_linear_data(skb, (void *)wr->ethmacdst, fw_hdr_copy_len);
+       skb_copy_from_linear_data(skb, &wr->firmware, fw_hdr_copy_len);
        end = (u64 *)wr + flits;
 
        /* If this is a Large Send Offload packet we'll put in an LSO CPL
 
        struct cpl_tx_pkt_core *cpl;
        const struct skb_shared_info *ssi;
        dma_addr_t addr[MAX_SKB_FRAGS + 1];
-       const size_t fw_hdr_copy_len = (sizeof(wr->ethmacdst) +
-                                       sizeof(wr->ethmacsrc) +
-                                       sizeof(wr->ethtype) +
-                                       sizeof(wr->vlantci));
+       const size_t fw_hdr_copy_len = sizeof(wr->firmware);
 
        /*
         * The chip minimum packet length is 10 octets but the firmware
        wr->equiq_to_len16 = cpu_to_be32(wr_mid);
        wr->r3[0] = cpu_to_be32(0);
        wr->r3[1] = cpu_to_be32(0);
-       skb_copy_from_linear_data(skb, (void *)wr->ethmacdst, fw_hdr_copy_len);
+       skb_copy_from_linear_data(skb, &wr->firmware, fw_hdr_copy_len);
        end = (u64 *)wr + flits;
 
        /*