PCI: dwc: kirin: Use pci_ops for root config space accessors

Now that DWC drivers can setup their own pci_ops for the root and child
buses, convert the HiSilicon Kirin driver to use the standard pci_ops
for root bus config accesses.

Link: https://lore.kernel.org/r/20200821035420.380495-10-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>

diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c
index e496f51e015275d654126af8b4f8f8b6e2a7fd5b..8a01ab0a4a6573e0d575a0f2355fadad57b2dd78 100644 (file)
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -330,34 +330,37 @@ static void kirin_pcie_sideband_dbi_r_mode(struct kirin_pcie *kirin_pcie,
        kirin_apb_ctrl_writel(kirin_pcie, val, SOC_PCIECTRL_CTRL1_ADDR);
 }
 
-static int kirin_pcie_rd_own_conf(struct pcie_port *pp,
+static int kirin_pcie_rd_own_conf(struct pci_bus *bus, unsigned int devfn,
                                  int where, int size, u32 *val)
 {
-       struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-       struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci);
-       int ret;
+       struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata);
 
-       kirin_pcie_sideband_dbi_r_mode(kirin_pcie, true);
-       ret = dw_pcie_read(pci->dbi_base + where, size, val);
-       kirin_pcie_sideband_dbi_r_mode(kirin_pcie, false);
+       if (PCI_SLOT(devfn)) {
+               *val = ~0;
+               return PCIBIOS_DEVICE_NOT_FOUND;
+       }
 
-       return ret;
+       *val = dw_pcie_read_dbi(pci, where, size);
+       return PCIBIOS_SUCCESSFUL;
 }
 
-static int kirin_pcie_wr_own_conf(struct pcie_port *pp,
+static int kirin_pcie_wr_own_conf(struct pci_bus *bus, unsigned int devfn,
                                  int where, int size, u32 val)
 {
-       struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-       struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci);
-       int ret;
+       struct dw_pcie *pci = to_dw_pcie_from_pp(bus->sysdata);
 
-       kirin_pcie_sideband_dbi_w_mode(kirin_pcie, true);
-       ret = dw_pcie_write(pci->dbi_base + where, size, val);
-       kirin_pcie_sideband_dbi_w_mode(kirin_pcie, false);
+       if (PCI_SLOT(devfn))
+               return PCIBIOS_DEVICE_NOT_FOUND;
 
-       return ret;
+       dw_pcie_write_dbi(pci, where, size, val);
+       return PCIBIOS_SUCCESSFUL;
 }
 
+static struct pci_ops kirin_pci_ops = {
+       .read = kirin_pcie_rd_own_conf,
+       .write = kirin_pcie_wr_own_conf,
+};
+
 static u32 kirin_pcie_read_dbi(struct dw_pcie *pci, void __iomem *base,
                               u32 reg, size_t size)
 {
@@ -423,6 +426,8 @@ static int kirin_pcie_establish_link(struct pcie_port *pp)
 
 static int kirin_pcie_host_init(struct pcie_port *pp)
 {
+       pp->bridge->ops = &kirin_pci_ops;
+
        kirin_pcie_establish_link(pp);
 
        if (IS_ENABLED(CONFIG_PCI_MSI))
@@ -438,8 +443,6 @@ static const struct dw_pcie_ops kirin_dw_pcie_ops = {
 };
 
 static const struct dw_pcie_host_ops kirin_pcie_host_ops = {
-       .rd_own_conf = kirin_pcie_rd_own_conf,
-       .wr_own_conf = kirin_pcie_wr_own_conf,
        .host_init = kirin_pcie_host_init,
 };