return true;
 }
 
-static bool intel_crt_present(struct drm_i915_private *dev_priv)
+static bool intel_ddi_crt_present(struct drm_i915_private *dev_priv)
 {
        if (INTEL_GEN(dev_priv) >= 9)
                return false;
        if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
                return false;
 
-       if (IS_CHERRYVIEW(dev_priv))
-               return false;
-
        if (HAS_PCH_LPT_H(dev_priv) &&
            I915_READ(SFUSE_STRAP) & SFUSE_STRAP_CRT_DISABLED)
                return false;
 
        /* DDI E can't be used if DDI A requires 4 lanes */
-       if (HAS_DDI(dev_priv) && I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)
+       if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)
                return false;
 
        if (!dev_priv->vbt.int_crt_support)
         */
        intel_lvds_init(dev_priv);
 
-       if (intel_crt_present(dev_priv))
-               intel_crt_init(dev_priv);
-
        if (IS_ICELAKE(dev_priv)) {
                intel_ddi_init(dev_priv, PORT_A);
                intel_ddi_init(dev_priv, PORT_B);
        } else if (HAS_DDI(dev_priv)) {
                int found;
 
+               if (intel_ddi_crt_present(dev_priv))
+                       intel_crt_init(dev_priv);
+
                /*
                 * Haswell uses DDI functions to detect digital outputs.
                 * On SKL pre-D0 the strap isn't connected, so we assume
 
        } else if (HAS_PCH_SPLIT(dev_priv)) {
                int found;
+
+               if (dev_priv->vbt.int_crt_support)
+                       intel_crt_init(dev_priv);
+
                dpd_is_edp = intel_dp_is_port_edp(dev_priv, PORT_D);
 
                if (has_edp_a(dev_priv))
        } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                bool has_edp, has_port;
 
+               if (IS_VALLEYVIEW(dev_priv) && dev_priv->vbt.int_crt_support)
+                       intel_crt_init(dev_priv);
+
                /*
                 * The DP_DETECTED bit is the latched state of the DDC
                 * SDA pin at boot. However since eDP doesn't require DDC
                }
 
                vlv_dsi_init(dev_priv);
-       } else if (!IS_GEN(dev_priv, 2) && !IS_PINEVIEW(dev_priv)) {
+       } else if (IS_PINEVIEW(dev_priv)) {
+               if (dev_priv->vbt.int_crt_support)
+                       intel_crt_init(dev_priv);
+       } else if (IS_GEN_RANGE(dev_priv, 3, 4)) {
                bool found = false;
 
+               if (dev_priv->vbt.int_crt_support)
+                       intel_crt_init(dev_priv);
+
                if (I915_READ(GEN3_SDVOB) & SDVO_DETECTED) {
                        DRM_DEBUG_KMS("probing SDVOB\n");
                        found = intel_sdvo_init(dev_priv, GEN3_SDVOB, PORT_B);
 
                if (IS_G4X(dev_priv) && (I915_READ(DP_D) & DP_DETECTED))
                        intel_dp_init(dev_priv, DP_D, PORT_D);
-       } else if (IS_GEN(dev_priv, 2))
+       } else if (IS_GEN(dev_priv, 2)) {
+               if (dev_priv->vbt.int_crt_support)
+                       intel_crt_init(dev_priv);
+
                intel_dvo_init(dev_priv);
+       }
 
        if (SUPPORTS_TV(dev_priv))
                intel_tv_init(dev_priv);