Modifications for 1.1.6:
======================================================================
+* Add support for TTTech board (TQM823E + Sharp LQ104V7DS01 Display)
+
+* Patch by Stefan Roese, 11 Mar 2002
+ Fixes for ESD boards
+
+* Patch by Frank Panno, 11 Mar 2002:
+ - fix warnings, add CFG_RESET_ADDRESS in include/config_ep8260.h
+
* Add configuration for MicroSys CPU86 board
* Patch by Erik Theisen, 9 Mar 2002:
W7OLMC PPC4xx
W7OLMG PPC4xx
+Murray Jensen <Murray.Jensen@cmst.csiro.au>
+
+ cogent_mpc8xx MPC8xx
+
+ cogent_mpc8260 MPC8260
+ hymod MPC8260
+
+Frank Panno <fpanno@delphintech.com>
+
+ ep8260 MPC8260
+
+Stefan Roese <stefan.roese@esd-electronics.com>
+
+ ADCIOP IOP480 (PPC401)
+ AR405 PPC405GP
+ CANBT PPC405CR
+ CPCI405 PPC405GP
+ CPCIISER4 PPC405GP
+ DASA_SIM IOP480 (PPC401)
+ DU405 PPC405GP
+ OCRTC PPC405GP
+ ORSG PPC405GP
+
+Jim Thompson <jim@musenki.com>
+
+ MUSENKI MPC8245/8241
+ Sandpoint8245 MPC8245
+
+Oliver Brown <obrown@adventnetworks.com>
+
+ sbc8260 MPC8260
+ gw8260 MPC8260
+
-------------------------------------------------------------------------
Unknown / orphaned boards:
RPXClassic MPC8xx
RPXlite MPC8xx
SXNI855T MPC8xx
- cogent_mpc8xx MPC8xx
- ADCIOP PPC4xx
- AR405 PPC4xx
- CANBT PPC4xx
- CPCI405 PPC4xx
- CPCIISER4 PPC4xx
CRAYL1 PPC4xx
- DASA_SIM PPC4xx
- DU405 PPC4xx
ERIC PPC4xx
MIP405 PPC4xx
- OCRTC PPC4xx
PIP405 PPC4xx
WALNUT405 PPC4xx
MOUSSE MPC824x
- MUSENKI MPC824x
- Sandpoint8245 MPC8245
- cogent_mpc8260 MPC8260
- ep8260 MPC8260
- gw8260 MPC8260
- hymod MPC8260
MPC8260ADS MPC8260
RPXsuper MPC8260
rsdproto MPC8260
MHPC NX823 pcu_e RPXClassic \
RPXlite SM850 SPD823TS SXNI855T \
TQM823L TQM823L_LCD TQM850L TQM855L \
- TQM860L TQM860L_FEC \
+ TQM860L TQM860L_FEC TTTech \
"
#########################################################################
LIST_4xx=" \
ADCIOP AR405 CANBT CPCI405 \
CPCIISER4 CRAYL1 DASA_SIM DU405 \
- ERIC MIP405 OCRTC PIP405 \
- W7OLMC W7OLMG WALNUT405 \
+ ERIC MIP405 OCRTC ORSG \
+ PIP405 W7OLMC W7OLMG WALNUT405 \
"
#########################################################################
}
@[ -z "$(findstring _LCD,$@)" ] || \
{ echo "#define CONFIG_LCD" >>include/config.h ; \
+ echo "#define CONFIG_NEC_NL6648BC20" >>include/config.h ; \
echo "... with LCD display" ; \
}
@echo "#include <config_$(call xtract,$@).h>" >>include/config.h
+TTTech_config: unconfig
+ @echo "Configuring for $@ Board..." ; \
+ cd ./include ; \
+ echo "ARCH = ppc" > config.mk ; \
+ echo "BOARD = tqm8xx" >>config.mk ; \
+ echo "CPU = mpc8xx" >>config.mk
+ @echo "/* Automatically generated - do not edit */" >include/config.h
+ @echo "#define CONFIG_LCD" >>include/config.h
+ @echo "#define CONFIG_SHARP_LQ104V7DS01" >>include/config.h
+ @echo "#include <config_TQM823L.h>" >>include/config.h
+
#########################################################################
## PPC4xx Systems
#########################################################################
*/
static int write_dword (flash_info_t *info, ulong dest, unsigned char * pdata)
{
- ulong start, cl, ch;
+ ulong start;
+ ulong cl = 0, ch =0;
int flag, i;
for (ch=0, i=0; i < 4; i++)
{
unsigned long conAdrVal;
unsigned long val;
- unsigned long Value;
+ unsigned long Value = 0;
/* generate coded value for CON_ADR register */
{
unsigned long conAdrVal;
unsigned long val;
- unsigned long Value;
+ unsigned long Value = 0;
/* generate coded value for CON_ADR register */
/* ** DEBUG SETTINGS */
/************************************************************************/
-#undef LCD_DEBUG
+#undef LCD_DEBUG
#ifdef LCD_DEBUG
#define DEBUGF(fmt,args...) printf(fmt ,##args)
/* ** CONFIG STUFF -- should be moved to board config file */
/************************************************************************/
#define CONFIG_LCD_LOGO
-#define LCD_INFO
-//#define LCD_TEST_PATTERN
+#define LCD_INFO /* Display Logo, (C) and system info */
+/* #define LCD_TEST_PATTERN */ /* color backgnd for frame/color adjust */
+/* #define CFG_INVERT_COLORS */ /* Not needed - adjust vl_dp instead */
/************************************************************************/
/************************************************************************/
#endif /* CONFIG_NEC_NL6648BC20 */
/*----------------------------------------------------------------------*/
+#ifdef CONFIG_SHARP_LQ104V7DS01
+/*
+ * SHARP LQ104V7DS01. 6.5", 640x480. Active, color, single scan.
+ */
+static vidinfo_t panel_info = {
+ 640, 480, 132, 99, CFG_HIGH, CFG_HIGH, CFG_LOW, CFG_LOW, CFG_LOW,
+ 3, 0, 0, 1, 1, 25, 1, 0, 33
+ /* wbl, vpw, lcdac, wbf */
+};
+#endif /* CONFIG_SHARP_LQ104V7DS01 */
+/*----------------------------------------------------------------------*/
+
#ifdef CONFIG_SHARP_16x9
/*
* Sharp 320x240. Active, color, single scan. It isn't 16x9, and I am
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile cpm8xx_t *cp = &(immr->im_cpm);
+ unsigned short colreg, *cmap_ptr;
- *red = (cp->lcd_cmap[ regno * 2 ] & 0x0f);
- *green = (cp->lcd_cmap[(regno * 2) + 1] & 0xf0) >> 4;
- *blue = (cp->lcd_cmap[(regno * 2) + 1] & 0x0f);
+ cmap_ptr = (unsigned short *)&cp->lcd_cmap[regno * 2];
+
+ colreg = *cmap_ptr;
+#ifdef CFG_INVERT_COLORS
+ colreg ^= 0x0FFF;
+#endif
+
+ *red = (colreg >> 8) & 0x0F;
+ *green = (colreg >> 4) & 0x0F;
+ *blue = colreg & 0x0F;
}
#endif /* NOT_USED_SO_FAR */
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
volatile cpm8xx_t *cp = &(immr->im_cpm);
+ unsigned short colreg, *cmap_ptr;
- cp->lcd_cmap[ regno * 2 ] = (red & 0x0F);
- cp->lcd_cmap[(regno * 2) + 1] = ((green & 0x0F) << 4) | (blue & 0x0F);
+ cmap_ptr = (unsigned short *)&cp->lcd_cmap[regno * 2];
+
+ colreg = ((red & 0x0F) << 8) |
+ ((green & 0x0F) << 4) |
+ (blue & 0x0F) ;
+#ifdef CFG_INVERT_COLORS
+ colreg ^= 0x0FFF;
+#endif
+ *cmap_ptr = colreg;
DEBUGF ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %02X%02X\n",
regno, &(cp->lcd_cmap[regno * 2]),
/* Set color map */
for (i=0; i<(sizeof(bmp_logo_palette)/(sizeof(ushort))); ++i) {
- *cmap++ = bmp_logo_palette[i];
+ ushort colreg = bmp_logo_palette[i];
+#ifdef CFG_INVERT_COLORS
+ colreg ^= 0xFFF;
+#endif
+ *cmap++ = colreg;
}
bmap = &bmp_logo_bitmap[0];
}
}
-#endif /* CONFIG_405GP || CONFIG_405CR */
-
-ulong get_gclk_freq (void)
+/********************************************
+ * get_OPB_freq
+ * return OPB bus freq in Hz
+*********************************************/
+ulong get_OPB_freq (void)
{
- ulong val;
+ ulong val = 0;
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
PPC405_SYS_INFO sys_info;
get_sys_info (&sys_info);
- val = sys_info.freqProcessor;
-#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
-
-#ifdef CONFIG_IOP480
- val = 66000000;
-#endif
+ val = sys_info.freqPLB / sys_info.pllOpbDiv;
return val;
}
-/* ------------------------------------------------------------------------- */
+
/********************************************
- * get_bus_freq
- * return PLB bus freq in Hz
+ * get_PCI_freq
+ * return PCI bus freq in Hz
*********************************************/
-ulong get_bus_freq (ulong gclk_freq)
+ulong get_PCI_freq (void)
{
ulong val;
-
-#ifdef CONFIG_405GP
PPC405_SYS_INFO sys_info;
get_sys_info (&sys_info);
- val = sys_info.freqPLB;
-#endif /* CONFIG_405GP */
-
-#ifdef CONFIG_IOP480
- val = 66;
-#endif
-
-#if !defined(CONFIG_405GP) && (!defined(CONFIG_IOP480))
-#error get_bus_freq() not implemented
-#endif
-
+ val = sys_info.freqPLB / sys_info.pllPciDiv;
return val;
}
+#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
-/********************************************
- * get_OPB_freq
- * return OPB bus freq in Hz
-*********************************************/
-ulong get_OPB_freq (void)
+
+ulong get_gclk_freq (void)
{
- ulong val = 0;
+ ulong val;
-#ifdef CONFIG_405GP
+#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
PPC405_SYS_INFO sys_info;
get_sys_info (&sys_info);
- val = sys_info.freqPLB / sys_info.pllOpbDiv;
-#else
-# error get_OPB_freq() not implemented
-#endif /* CONFIG_405GP */
+ val = sys_info.freqProcessor;
+#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
+
+#ifdef CONFIG_IOP480
+ val = 66000000;
+#endif
return val;
}
-#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
/********************************************
- * get_PCI_freq
- * return PCI bus freq in Hz
+ * get_bus_freq
+ * return PLB bus freq in Hz
*********************************************/
-ulong get_PCI_freq (void)
+ulong get_bus_freq (ulong gclk_freq)
{
ulong val;
+
+#if defined(CONFIG_405GP) || defined(CONFIG_405CR)
PPC405_SYS_INFO sys_info;
get_sys_info (&sys_info);
- val = sys_info.freqPLB / sys_info.pllPciDiv;
+ val = sys_info.freqPLB;
+#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
+
+#ifdef CONFIG_IOP480
+ val = 66;
+#endif
+
return val;
}
-#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
-/*---------------------------------------------------------------------- */
#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_EEPROM | \
- CFG_CMD_DATE | CFG_CMD_DOC)
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_DATE | \
+ CFG_CMD_I2C | \
+ CFG_CMD_DOC)
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
/*-----------------------------------------------------------------------
* Cache Configuration
*/
-#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
+#define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
#define CONFIG_TQM823L 1 /* ...on a TQM8xxL module */
#ifdef CONFIG_LCD /* with LCD controller ? */
-#define CONFIG_NEC_NL6648BC20 1 /* use NEC NL6648BC20 display */
+/* #define CONFIG_NEC_NL6648BC20 1 / * use NEC NL6648BC20 display */
#endif
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
/* #define CFG_SBC_BOOT_LOW 1 */ /* only for HRCW */
/* #undef CFG_SBC_BOOT_LOW */
+/* The reset command will not work as expected if the reset address does
+ * not point to the correct address.
+ */
+
+#define CFG_RESET_ADDRESS 0xFFF00100
+
/* What should the base address of the main FLASH be and how big is
* it (in MBytes)? This must contain TEXT_BASE from board/ep8260/config.mk
* The main FLASH is whichever is connected to *CS0. PPCBOOT expects