Merge branch 'pci/controller/dwc-cpu-addr-fixup'

- Ioremap() msg_res region using res->start (the CPU address), not the ATU
  'cpu_addr', which will be replaced with the ATU input address (which may
  not be the CPU address) (Frank Li)

- Rename struct dw_pcie_ob_atu_cfg.cpu_addr to 'parent_bus_addr' (Frank Li)

- Call devm_pci_alloc_host_bridge() early in dw_pcie_host_init() to keep
  devicetree-related code together (Frank Li)

- Consolidate devicetree handling in dw_pcie_host_get_resources() (Bjorn
  Helgaas)

- Add dw_pcie_parent_bus_offset() to look up the parent bus address of a
  specified 'reg' property and return the offset from the CPU physical
  address (Frank Li)

- Add cross-checking with .cpu_addr_fixup() and debug logging to
  dw_pcie_parent_bus_offset() (Frank Li)

- Use devicetree 'reg[config]' via dw_pcie_parent_bus_offset() to derive
  CPU -> ATU addr offset for host controller (Frank Li)

- Call epc_create() early in dw_pcie_ep_init() to keep devicetree-related
  code together (Bjorn Helgaas)

- Consolidate devicetree handling in dw_pcie_ep_get_resources() (Bjorn
  Helgaas)

- Use devicetree 'reg[addr_space]' via dw_pcie_parent_bus_offset() to
  derive CPU -> ATU addr offset for endpoint controller (Frank Li)

- Update dw_pcie_find_index() to remove assumption that ATU input address
  is non-zero (Frank Li)

- Apply struct dw_pcie.parent_bus_offset in ATU users to remove use of
  .cpu_addr_fixup() when programming ATU (Frank Li)

- Remove imx_pcie_cpu_addr_fixup() since dwc core can now derive the ATU
  input address (using parent_bus_offset) from devicetree (Frank Li)

- Remove intel_pcie_cpu_addr() since dwc core can now derive the ATU input
  address (using parent_bus_offset) from devicetree (Frank Li)

* pci/controller/dwc-cpu-addr-fixup:
  PCI: intel-gw: Remove intel_pcie_cpu_addr()
  PCI: imx6: Remove imx_pcie_cpu_addr_fixup()
  PCI: dwc: Use parent_bus_offset to remove need for .cpu_addr_fixup()
  PCI: dwc: ep: Ensure proper iteration over outbound map windows
  PCI: dwc: ep: Use devicetree 'reg[addr_space]' to derive CPU -> ATU addr offset
  PCI: dwc: ep: Consolidate devicetree handling in dw_pcie_ep_get_resources()
  PCI: dwc: ep: Call epc_create() early in dw_pcie_ep_init()
  PCI: dwc: Use devicetree 'reg[config]' to derive CPU -> ATU addr offset
  PCI: dwc: Add dw_pcie_parent_bus_offset() checking and debug
  PCI: dwc: Add dw_pcie_parent_bus_offset()
  PCI: dwc: Consolidate devicetree handling in dw_pcie_host_get_resources()
  PCI: dwc: Call devm_pci_alloc_host_bridge() early in dw_pcie_host_init()
  PCI: dwc: Rename cpu_addr to parent_bus_addr for ATU configuration
  PCI: dwc: Use resource start as ioremap() input in dw_pcie_pme_turn_off()

# Conflicts:
#	drivers/pci/controller/dwc/pcie-designware.c
#	drivers/pci/controller/dwc/pcie-designware.h

diff --cc drivers/pci/controller/dwc/pci-imx6.c
Simple merge

diff --cc drivers/pci/controller/dwc/pcie-designware-ep.c
Simple merge

diff --cc drivers/pci/controller/dwc/pcie-designware-host.c
Simple merge

diff --cc drivers/pci/controller/dwc/pcie-designware.c
index 3d1d95d9e38057dd1389e2d57d701ce4f4fa6f7f,151085343adea33cdf89fe4fa7f3581924e00ac8..97d76d3dc066efeff093de28dcac64411dad51aa
--- 1/drivers/pci/controller/dwc/pcie-designware.c
--- 2/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@@ -16,7 -16,7 +16,8 @@@
  #include <linux/gpio/consumer.h>
  #include <linux/ioport.h>
  #include <linux/of.h>
+ #include <linux/of_address.h>
 +#include <linux/pcie-dwc.h>
  #include <linux/platform_device.h>
  #include <linux/sizes.h>
  #include <linux/types.h>

diff --cc drivers/pci/controller/dwc/pcie-designware.h
index 2d1de81d47b67fc0df941484b1d92d986b2b4dbd,741c46926ce268d128fee800ccac8866e3abe4b9..56aafdbcdacaff6b738800fb03ae60eb13c9a0f2
--- 1/drivers/pci/controller/dwc/pcie-designware.h
--- 2/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@@ -501,7 -466,19 +502,20 @@@ struct dw_pcie 
        struct reset_control_bulk_data  core_rsts[DW_PCIE_NUM_CORE_RSTS];
        struct gpio_desc                *pe_rst;
        bool                    suspended;
 +      struct debugfs_info     *debugfs;
+ 
+       /*
+        * If iATU input addresses are offset from CPU physical addresses,
+        * we previously required .cpu_addr_fixup() to convert them.  We
+        * now rely on the devicetree instead.  If .cpu_addr_fixup()
+        * exists, we compare its results with devicetree.
+        *
+        * If .cpu_addr_fixup() does not exist, we assume the offset is
+        * zero and warn if devicetree claims otherwise.  If we know all
+        * devicetrees correctly describe the offset, set
+        * use_parent_dt_ranges to true to avoid this warning.
+        */
+       bool                    use_parent_dt_ranges;
  };
  
  #define to_dw_pcie_from_pp(port) container_of((port), struct dw_pcie, pp)