]> www.infradead.org Git - users/jedix/linux-maple.git/commitdiff
arm64: dts: qcom: sm8650: add interconnect and opp-peak-kBps for GPU
authorNeil Armstrong <neil.armstrong@linaro.org>
Tue, 17 Dec 2024 14:51:20 +0000 (15:51 +0100)
committerBjorn Andersson <andersson@kernel.org>
Thu, 26 Dec 2024 22:30:37 +0000 (16:30 -0600)
Each GPU OPP requires a specific peak DDR bandwidth, let's add
those to each OPP and also the related interconnect path.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241217-topic-sm8x50-gpu-bw-vote-v6-7-1adaf97e7310@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sm8650.dtsi

index 25e47505adcb790d09f1d2726386438487255824..c76c0038c35ab048c88be9870b14c3a0b24b4183 100644 (file)
                        qcom,gmu = <&gmu>;
                        #cooling-cells = <2>;
 
+                       interconnects = <&gem_noc MASTER_GFX3D QCOM_ICC_TAG_ALWAYS
+                                        &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
+                       interconnect-names = "gfx-mem";
+
                        status = "disabled";
 
                        zap-shader {
                                opp-231000000 {
                                        opp-hz = /bits/ 64 <231000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
+                                       opp-peak-kBps = <2136718>;
                                };
 
                                opp-310000000 {
                                        opp-hz = /bits/ 64 <310000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+                                       opp-peak-kBps = <2136718>;
                                };
 
                                opp-366000000 {
                                        opp-hz = /bits/ 64 <366000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
+                                       opp-peak-kBps = <6074218>;
                                };
 
                                opp-422000000 {
                                        opp-hz = /bits/ 64 <422000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+                                       opp-peak-kBps = <8171875>;
                                };
 
                                opp-500000000 {
                                        opp-hz = /bits/ 64 <500000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+                                       opp-peak-kBps = <8171875>;
                                };
 
                                opp-578000000 {
                                        opp-hz = /bits/ 64 <578000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+                                       opp-peak-kBps = <8171875>;
                                };
 
                                opp-629000000 {
                                        opp-hz = /bits/ 64 <629000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
+                                       opp-peak-kBps = <10687500>;
                                };
 
                                opp-680000000 {
                                        opp-hz = /bits/ 64 <680000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+                                       opp-peak-kBps = <12449218>;
                                };
 
                                opp-720000000 {
                                        opp-hz = /bits/ 64 <720000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+                                       opp-peak-kBps = <12449218>;
                                };
 
                                opp-770000000 {
                                        opp-hz = /bits/ 64 <770000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+                                       opp-peak-kBps = <12449218>;
                                };
 
                                opp-834000000 {
                                        opp-hz = /bits/ 64 <834000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+                                       opp-peak-kBps = <14398437>;
                                };
                        };
                };