{
        struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
        struct smu7_dpm_table *golden_dpm_table = &data->golden_dpm_table;
-       struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk =
-                       hwmgr->dyn_state.vddc_dependency_on_sclk;
-       struct phm_ppt_v1_information *table_info =
-                       (struct phm_ppt_v1_information *)(hwmgr->pptable);
-       struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk =
-                       table_info->vdd_dep_on_sclk;
        int32_t tmp_sclk, count, percentage;
 
        if (golden_dpm_table->mclk_table.count == 1) {
        tmp_sclk = hwmgr->pstate_mclk * percentage / 100;
 
        if (hwmgr->pp_table_version == PP_TABLE_V0) {
+               struct phm_clock_voltage_dependency_table *vddc_dependency_on_sclk =
+                       hwmgr->dyn_state.vddc_dependency_on_sclk;
+
                for (count = vddc_dependency_on_sclk->count - 1; count >= 0; count--) {
                        if (tmp_sclk >= vddc_dependency_on_sclk->entries[count].clk) {
                                hwmgr->pstate_sclk = vddc_dependency_on_sclk->entries[count].clk;
                hwmgr->pstate_sclk_peak =
                        vddc_dependency_on_sclk->entries[vddc_dependency_on_sclk->count - 1].clk;
        } else if (hwmgr->pp_table_version == PP_TABLE_V1) {
+               struct phm_ppt_v1_information *table_info =
+                       (struct phm_ppt_v1_information *)(hwmgr->pptable);
+               struct phm_ppt_v1_clock_voltage_dependency_table *vdd_dep_on_sclk =
+                       table_info->vdd_dep_on_sclk;
+
                for (count = vdd_dep_on_sclk->count - 1; count >= 0; count--) {
                        if (tmp_sclk >= vdd_dep_on_sclk->entries[count].clk) {
                                hwmgr->pstate_sclk = vdd_dep_on_sclk->entries[count].clk;