*/
 #define UFS_DEVICE_QUIRK_DELAY_AFTER_LPM        (1 << 11)
 
+/*
+ * Some UFS devices require L2P entry should be swapped before being sent to the
+ * UFS device for HPB READ command.
+ */
+#define UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ (1 << 12)
+
 #endif /* UFS_QUIRKS_H_ */
 
 static struct ufs_dev_fix ufs_fixups[] = {
        /* UFS cards deviations table */
        UFS_FIX(UFS_VENDOR_MICRON, UFS_ANY_MODEL,
-               UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
+               UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
+               UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ),
        UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
                UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM |
                UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE |
 
 }
 
 static void
-ufshpb_set_hpb_read_to_upiu(struct ufshpb_lu *hpb, struct ufshcd_lrb *lrbp,
-                           u32 lpn, __be64 ppn, u8 transfer_len, int read_id)
+ufshpb_set_hpb_read_to_upiu(struct ufs_hba *hba, struct ufshpb_lu *hpb,
+                           struct ufshcd_lrb *lrbp, u32 lpn, __be64 ppn,
+                           u8 transfer_len, int read_id)
 {
        unsigned char *cdb = lrbp->cmd->cmnd;
-
+       __be64 ppn_tmp = ppn;
        cdb[0] = UFSHPB_READ;
 
+       if (hba->dev_quirks & UFS_DEVICE_QUIRK_SWAP_L2P_ENTRY_FOR_HPB_READ)
+               ppn_tmp = swab64(ppn);
+
        /* ppn value is stored as big-endian in the host memory */
-       memcpy(&cdb[6], &ppn, sizeof(__be64));
+       memcpy(&cdb[6], &ppn_tmp, sizeof(__be64));
        cdb[14] = transfer_len;
        cdb[15] = read_id;
 
                }
        }
 
-       ufshpb_set_hpb_read_to_upiu(hpb, lrbp, lpn, ppn, transfer_len, read_id);
+       ufshpb_set_hpb_read_to_upiu(hba, hpb, lrbp, lpn, ppn, transfer_len,
+                                   read_id);
 
        hpb->stats.hit_cnt++;
        return 0;