PCAL chips ("L" seems to stand for "latched") have additional
registers starting at address 0x40 to control the latches,
interrupt mask, pull-up and pull down etc.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
#define PCA957X_MSK 0x06
#define PCA957X_INTS 0x07
+#define PCAL953X_OUT_STRENGTH 0x20
#define PCAL953X_IN_LATCH 0x22
+#define PCAL953X_PULL_EN 0x23
+#define PCAL953X_PULL_SEL 0x24
#define PCAL953X_INT_MASK 0x25
#define PCAL953X_INT_STAT 0x26
+#define PCAL953X_OUT_CONF 0x27
#define PCA_GPIO_MASK 0x00FF
#define PCA_INT 0x0100