ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings

[ Upstream commit 2388f14d8747f8304e26ee870790e188c9431efd ]

Prevent warning seen with "make dtbs_check W=1" command:

Warning (avoid_unnecessary_addr_size): /soc/timers@40001c00: unnecessary
address-cells/size-cells without "ranges" or child "reg" property

Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index b16bf00977d5c7750dc7eac4393360597ee965aa..fdaf4329000607830be402ad6337039a10436946 100644 (file)
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -263,8 +263,6 @@
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
@@ -278,8 +276,6 @@
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
@@ -558,8 +554,6 @@
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
@@ -573,8 +567,6 @@
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;

diff --git a/arch/arm/boot/dts/stm32f746.dtsi b/arch/arm/boot/dts/stm32f746.dtsi
index f48d06a80d1d67e09cb2e0ba2a9873583df28947..ccd87e83304910dd46b4a522ec7a8a444803faf2 100644 (file)
--- a/arch/arm/boot/dts/stm32f746.dtsi
+++ b/arch/arm/boot/dts/stm32f746.dtsi
@@ -258,8 +258,6 @@
                };
 
                timers13: timers@40001c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40001C00 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
@@ -273,8 +271,6 @@
                };
 
                timers14: timers@40002000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40002000 0x400>;
                        clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
@@ -521,8 +517,6 @@
                };
 
                timers10: timers@40014400 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014400 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
@@ -536,8 +530,6 @@
                };
 
                timers11: timers@40014800 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-timers";
                        reg = <0x40014800 0x400>;
                        clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;

diff --git a/arch/arm/boot/dts/stm32h743.dtsi b/arch/arm/boot/dts/stm32h743.dtsi
index 637beffe506700eb869f03e0089bfe63b3776fe9..729ff6264776cf6b1d071f4ab7b9c414e585ac33 100644 (file)
--- a/arch/arm/boot/dts/stm32h743.dtsi
+++ b/arch/arm/boot/dts/stm32h743.dtsi
@@ -422,8 +422,6 @@
                };
 
                lptimer4: timer@58002c00 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58002c00 0x400>;
                        clocks = <&rcc LPTIM4_CK>;
@@ -438,8 +436,6 @@
                };
 
                lptimer5: timer@58003000 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
                        compatible = "st,stm32-lptimer";
                        reg = <0x58003000 0x400>;
                        clocks = <&rcc LPTIM5_CK>;