Merge tag 'kvm-4.9-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm

Pull KVM updates from Radim Krčmář:
 "All architectures:
   - move `make kvmconfig` stubs from x86
   - use 64 bits for debugfs stats

  ARM:
   - Important fixes for not using an in-kernel irqchip
   - handle SError exceptions and present them to guests if appropriate
   - proxying of GICV access at EL2 if guest mappings are unsafe
   - GICv3 on AArch32 on ARMv8
   - preparations for GICv3 save/restore, including ABI docs
   - cleanups and a bit of optimizations

  MIPS:
   - A couple of fixes in preparation for supporting MIPS EVA host
     kernels
   - MIPS SMP host & TLB invalidation fixes

  PPC:
   - Fix the bug which caused guests to falsely report lockups
   - other minor fixes
   - a small optimization

  s390:
   - Lazy enablement of runtime instrumentation
   - up to 255 CPUs for nested guests
   - rework of machine check deliver
   - cleanups and fixes

  x86:
   - IOMMU part of AMD's AVIC for vmexit-less interrupt delivery
   - Hyper-V TSC page
   - per-vcpu tsc_offset in debugfs
   - accelerated INS/OUTS in nVMX
   - cleanups and fixes"

* tag 'kvm-4.9-1' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (140 commits)
  KVM: MIPS: Drop dubious EntryHi optimisation
  KVM: MIPS: Invalidate TLB by regenerating ASIDs
  KVM: MIPS: Split kernel/user ASID regeneration
  KVM: MIPS: Drop other CPU ASIDs on guest MMU changes
  KVM: arm/arm64: vgic: Don't flush/sync without a working vgic
  KVM: arm64: Require in-kernel irqchip for PMU support
  KVM: PPC: Book3s PR: Allow access to unprivileged MMCR2 register
  KVM: PPC: Book3S PR: Support 64kB page size on POWER8E and POWER8NVL
  KVM: PPC: Book3S: Remove duplicate setting of the B field in tlbie
  KVM: PPC: BookE: Fix a sanity check
  KVM: PPC: Book3S HV: Take out virtual core piggybacking code
  KVM: PPC: Book3S: Treat VTB as a per-subcore register, not per-thread
  ARM: gic-v3: Work around definition of gic_write_bpr1
  KVM: nVMX: Fix the NMI IDT-vectoring handling
  KVM: VMX: Enable MSR-BASED TPR shadow even if APICv is inactive
  KVM: nVMX: Fix reload apic access page warning
  kvmconfig: add virtio-gpu to config fragment
  config: move x86 kvm_guest.config to a common location
  arm64: KVM: Remove duplicating init code for setting VMID
  ARM: KVM: Support vgic-v3
  ...

diff --cc Documentation/kernel-parameters.txt
Simple merge

diff --cc arch/arm/include/asm/arch_gicv3.h
index dfe4002812dad6789b77e3a9ebde959ee79ae9cf,1fee657d3827504cbc5570c609a917ae8200c1b5..a8088290b778706d6835328ea8f58b0fcaddfe65
--- 1/arch/arm/include/asm/arch_gicv3.h
--- 2/arch/arm/include/asm/arch_gicv3.h
+++ b/arch/arm/include/asm/arch_gicv3.h
@@@ -160,7 -218,11 +219,7 @@@ static inline void gic_write_sre(u32 va
  
  static inline void gic_write_bpr1(u32 val)
  {
-       asm volatile("mcr " __stringify(ICC_BPR1) : : "r" (val));
 -#if defined(__write_sysreg) && defined(ICC_BPR1)
+       write_sysreg(val, ICC_BPR1);
 -#else
 -      asm volatile("mcr " __stringify(ICC_BPR1) : : "r" (val));
 -#endif
  }
  
  /*

diff --cc arch/arm/include/asm/cputype.h
Simple merge

diff --cc arch/arm/kvm/arm.c
Simple merge

diff --cc arch/arm/kvm/mmu.c
Simple merge

diff --cc arch/arm64/include/asm/arch_gicv3.h
Simple merge

diff --cc arch/arm64/include/asm/kvm_mmu.h
Simple merge

diff --cc arch/powerpc/platforms/powernv/pci-ioda.c
Simple merge

diff --cc arch/s390/kvm/kvm-s390.c
Simple merge

diff --cc arch/x86/kvm/svm.c
Simple merge

diff --cc arch/x86/kvm/vmx.c
Simple merge

diff --cc arch/x86/kvm/x86.c
index 699f8726539a2044616b82bd9cf792a8617f8001,3ee8a91a78c393b1fc7d59f2b73337b06ea10c7e..6c633de84dd7339637e24604952fb4d2c5180562
--- 1/arch/x86/kvm/x86.c
--- 2/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@@ -2746,13 -2789,13 +2789,13 @@@ void kvm_arch_vcpu_load(struct kvm_vcp
                if (check_tsc_unstable()) {
                        u64 offset = kvm_compute_tsc_offset(vcpu,
                                                vcpu->arch.last_guest_tsc);
-                       kvm_x86_ops->write_tsc_offset(vcpu, offset);
+                       kvm_vcpu_write_tsc_offset(vcpu, offset);
                        vcpu->arch.tsc_catchup = 1;
                }
 +              if (kvm_lapic_hv_timer_in_use(vcpu) &&
 +                              kvm_x86_ops->set_hv_timer(vcpu,
 +                                      kvm_get_lapic_tscdeadline_msr(vcpu)))
 +                      kvm_lapic_switch_to_sw_timer(vcpu);
                /*
                 * On a host with synchronized TSC, there is no need to update
                 * kvmclock on vcpu->cpu migration

diff --cc drivers/iommu/amd_iommu.c
Simple merge

diff --cc drivers/iommu/amd_iommu_types.h
index 9652848e315580afeee72e3780e397ebe7d75ec6,fa766eefd5908d48f69a42ee565dc63de7f6c1bc..0d91785ebdc34accca7c4e9ed45da300ddbb68a7
--- 1/drivers/iommu/amd_iommu_types.h
--- 2/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@@ -523,9 -562,9 +562,11 @@@ struct amd_iommu 
  #ifdef CONFIG_IRQ_REMAP
        struct irq_domain *ir_domain;
        struct irq_domain *msi_domain;
+ 
+       struct amd_irte_ops *irte_ops;
  #endif
 +
 +      volatile u64 __aligned(8) cmd_sem;
  };
  
  #define ACPIHID_UID_LEN 256