drm/xe/ptl: Apply Wa_14022866841

As part of this WA, GuC will hold a forcewake for certain
MMIO accesses outside the GT/media domains.

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241015234428.2004825-1-vinay.belgaumkar@intel.com

diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
index 6b30743a2f6cb80f47c3d056daf3d52efc667103..37606cf8cc5e1e1d796627dfbd9335b4ec4e28fa 100644 (file)
--- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_klvs_abi.h
@@ -352,6 +352,7 @@ enum xe_guc_klv_ids {
        GUC_WORKAROUND_KLV_ID_DISABLE_MTP_DURING_ASYNC_COMPUTE                          = 0x9007,
        GUC_WA_KLV_NP_RD_WRITE_TO_CLEAR_RCSM_AT_CGP_LATE_RESTORE                        = 0x9008,
        GUC_WORKAROUND_KLV_ID_BACK_TO_BACK_RCS_ENGINE_RESET                             = 0x9009,
+       GUC_WA_KLV_WAKE_POWER_DOMAINS_FOR_OUTBOUND_MMIO                                 = 0x900a,
 };
 
 #endif

diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index 25292997c7f37834589c00db47c98e6b6f794064..4e746ae98888f50bacb4069168751cb02eadc2d0 100644 (file)
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -359,6 +359,11 @@ static void guc_waklv_init(struct xe_guc_ads *ads)
                                        GUC_WORKAROUND_KLV_ID_DISABLE_MTP_DURING_ASYNC_COMPUTE,
                                        &offset, &remain);
 
+       if (XE_WA(gt, 14022866841))
+               guc_waklv_enable_simple(ads,
+                                       GUC_WA_KLV_WAKE_POWER_DOMAINS_FOR_OUTBOUND_MMIO,
+                                       &offset, &remain);
+
        /*
         * On RC6 exit, GuC will write register 0xB04 with the default value provided. As of now,
         * the default value for this register is determined to be 0xC40. This could change in the

diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 264d6e116499ce9922cce5b126d4a3357fd88e59..bcd04464b85e887688882ab64c7b213e6efc319f 100644 (file)
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -39,3 +39,5 @@
 14019789679    GRAPHICS_VERSION(1255)
                GRAPHICS_VERSION_RANGE(1270, 2004)
 no_media_l3    MEDIA_VERSION(3000)
+14022866841    GRAPHICS_VERSION(3000), GRAPHICS_STEP(A0, B0)
+               MEDIA_VERSION(3000), MEDIA_STEP(A0, B0)