else
                dm->active_vblank_irq_count--;
 
-
+#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
        dc_allow_idle_optimizations(
                dm->dc, dm->active_vblank_irq_count == 0);
 
        DRM_DEBUG_DRIVER("Allow idle optimizations (MALL): %d\n", dm->active_vblank_irq_count == 0);
+#endif
 
 
        mutex_unlock(&dm->dc_lock);
 
         */
        struct mutex audio_lock;
 
+#if defined(CONFIG_DRM_AMD_DC_DCN)
        /**
-        * @vblank_work_lock:
+        * @vblank_lock:
         *
         * Guards access to deferred vblank work state.
         */
-#if defined(CONFIG_DRM_AMD_DC_DCN)
        spinlock_t vblank_lock;
 #endif
 
 #endif
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
+       /**
+        * @vblank_workqueue:
+        *
+        * amdgpu workqueue during vblank
+        */
        struct vblank_workqueue *vblank_workqueue;
 #endif
 
         */
        const struct gpu_info_soc_bounding_box_v1_0 *soc_bounding_box;
 
+#if defined(CONFIG_DRM_AMD_DC_DCN)
        /**
         * @active_vblank_irq_count:
         *
         * number of currently active vblank irqs
         */
        uint32_t active_vblank_irq_count;
+#endif
+
 #if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
        struct crc_rd_work *crc_rd_wrk;
 #endif