return ret;
 }
 
+static void g4x_dp_get_m_n(struct intel_crtc_state *crtc_state)
+{
+       struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
+       if (crtc_state->has_pch_encoder)
+               intel_pch_transcoder_get_m_n(crtc, &crtc_state->dp_m_n);
+       else
+               intel_cpu_transcoder_get_m_n(crtc, crtc_state->cpu_transcoder,
+                                            &crtc_state->dp_m_n,
+                                            &crtc_state->dp_m2_n2);
+}
+
 static void intel_dp_get_config(struct intel_encoder *encoder,
                                struct intel_crtc_state *pipe_config)
 {
        pipe_config->lane_count =
                ((tmp & DP_PORT_WIDTH_MASK) >> DP_PORT_WIDTH_SHIFT) + 1;
 
-       intel_dp_get_m_n(crtc, pipe_config);
+       g4x_dp_get_m_n(pipe_config);
 
        if (port == PORT_A) {
                if ((intel_de_read(dev_priv, DP_A) & DP_PLL_FREQ_MASK) == DP_PLL_FREQ_162MHZ)
 
                        pipe_config->output_types |= BIT(INTEL_OUTPUT_DP);
                pipe_config->lane_count =
                        ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
-               intel_dp_get_m_n(crtc, pipe_config);
+
+               intel_cpu_transcoder_get_m_n(crtc, cpu_transcoder,
+                                            &pipe_config->dp_m_n,
+                                            &pipe_config->dp_m2_n2);
 
                if (DISPLAY_VER(dev_priv) >= 11) {
                        i915_reg_t dp_tp_ctl = dp_tp_ctl_reg(encoder, pipe_config);
                        pipe_config->mst_master_transcoder =
                                        REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
 
-               intel_dp_get_m_n(crtc, pipe_config);
+               intel_cpu_transcoder_get_m_n(crtc, cpu_transcoder,
+                                            &pipe_config->dp_m_n,
+                                            &pipe_config->dp_m2_n2);
 
                pipe_config->infoframes.enable |=
                        intel_hdmi_infoframes_enabled(encoder, pipe_config);
 
        m_n->tu = REG_FIELD_GET(TU_SIZE_MASK, intel_de_read(i915, data_m_reg)) + 1;
 }
 
-static void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
-                                        struct intel_link_m_n *m_n)
+void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
+                                 struct intel_link_m_n *m_n)
 {
        struct drm_device *dev = crtc->base.dev;
        struct drm_i915_private *dev_priv = to_i915(dev);
                      PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe));
 }
 
-static void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,
-                                        enum transcoder transcoder,
-                                        struct intel_link_m_n *m_n,
-                                        struct intel_link_m_n *m2_n2)
+void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,
+                                 enum transcoder transcoder,
+                                 struct intel_link_m_n *m_n,
+                                 struct intel_link_m_n *m2_n2)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum pipe pipe = crtc->pipe;
        }
 }
 
-void intel_dp_get_m_n(struct intel_crtc *crtc,
-                     struct intel_crtc_state *pipe_config)
-{
-       if (pipe_config->has_pch_encoder)
-               intel_pch_transcoder_get_m_n(crtc, &pipe_config->dp_m_n);
-       else
-               intel_cpu_transcoder_get_m_n(crtc, pipe_config->cpu_transcoder,
-                                            &pipe_config->dp_m_n,
-                                            &pipe_config->dp_m2_n2);
-}
-
 void ilk_get_fdi_m_n_config(struct intel_crtc *crtc,
                            struct intel_crtc_state *pipe_config)
 {
 
 
 void intel_display_prepare_reset(struct drm_i915_private *dev_priv);
 void intel_display_finish_reset(struct drm_i915_private *dev_priv);
-void intel_dp_get_m_n(struct intel_crtc *crtc,
-                     struct intel_crtc_state *pipe_config);
 void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_state,
                                  const struct intel_link_m_n *m_n,
                                  const struct intel_link_m_n *m2_n2);
+void intel_cpu_transcoder_get_m_n(struct intel_crtc *crtc,
+                                 enum transcoder cpu_transcoder,
+                                 struct intel_link_m_n *m_n,
+                                 struct intel_link_m_n *m2_n2);
+void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc,
+                                 struct intel_link_m_n *m_n);
 void ilk_get_fdi_m_n_config(struct intel_crtc *crtc,
                            struct intel_crtc_state *pipe_config);
 void i9xx_crtc_clock_get(struct intel_crtc *crtc,