#include <linux/pm_runtime.h>
 
 #include <sound/soc.h>
-
+#include <drm/amd_asic_type.h>
 #include "acp.h"
 
 #define PLAYBACK_MIN_NUM_PERIODS    2
 }
 
 /* Initialize and bring ACP hardware to default state. */
-static int acp_init(void __iomem *acp_mmio)
+static int acp_init(void __iomem *acp_mmio, u32 asic_type)
 {
        u16 bank;
        u32 val, count, sram_pte_offset;
        /* When ACP_TILE_P1 is turned on, all SRAM banks get turned on.
        * Now, turn off all of them. This can't be done in 'poweron' of
        * ACP pm domain, as this requires ACP to be initialized.
+       * For Stoney, Memory gating is disabled,i.e SRAM Banks
+       * won't be turned off. The default state for SRAM banks is ON.
+       * Setting SRAM bank state code skipped for STONEY platform.
        */
-       for (bank = 1; bank < 48; bank++)
-               acp_set_sram_bank_state(acp_mmio, bank, false);
+       if (asic_type != CHIP_STONEY) {
+               for (bank = 1; bank < 48; bank++)
+                       acp_set_sram_bank_state(acp_mmio, bank, false);
+       }
 
        return 0;
 }
 
        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
                intr_data->play_stream = substream;
-               for (bank = 1; bank <= 4; bank++)
-                       acp_set_sram_bank_state(intr_data->acp_mmio, bank,
-                                               true);
+               /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+                * won't be turned off. The default state for SRAM banks is ON.
+                * Setting SRAM bank state code skipped for STONEY platform.
+                */
+               if (intr_data->asic_type != CHIP_STONEY) {
+                       for (bank = 1; bank <= 4; bank++)
+                               acp_set_sram_bank_state(intr_data->acp_mmio,
+                                                       bank, true);
+               }
        } else {
                intr_data->capture_stream = substream;
-               for (bank = 5; bank <= 8; bank++)
-                       acp_set_sram_bank_state(intr_data->acp_mmio, bank,
-                                               true);
+               if (intr_data->asic_type != CHIP_STONEY) {
+                       for (bank = 5; bank <= 8; bank++)
+                               acp_set_sram_bank_state(intr_data->acp_mmio,
+                                                       bank, true);
+               }
        }
 
        return 0;
 
        if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
                adata->play_stream = NULL;
-               for (bank = 1; bank <= 4; bank++)
-                       acp_set_sram_bank_state(adata->acp_mmio, bank,
-                                               false);
-       } else {
+               /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+                * won't be turned off. The default state for SRAM banks is ON.
+                * Setting SRAM bank state code skipped for STONEY platform.
+                * added condition checks for Carrizo platform only
+                */
+               if (adata->asic_type != CHIP_STONEY) {
+                       for (bank = 1; bank <= 4; bank++)
+                               acp_set_sram_bank_state(adata->acp_mmio, bank,
+                               false);
+               }
+       } else  {
                adata->capture_stream = NULL;
-               for (bank = 5; bank <= 8; bank++)
-                       acp_set_sram_bank_state(adata->acp_mmio, bank,
-                                               false);
+               if (adata->asic_type != CHIP_STONEY) {
+                       for (bank = 5; bank <= 8; bank++)
+                               acp_set_sram_bank_state(adata->acp_mmio, bank,
+                                                    false);
+               }
        }
 
        /* Disable ACP irq, when the current stream is being closed and
        dev_set_drvdata(&pdev->dev, audio_drv_data);
 
        /* Initialize the ACP */
-       acp_init(audio_drv_data->acp_mmio);
+       acp_init(audio_drv_data->acp_mmio, audio_drv_data->asic_type);
 
        status = snd_soc_register_platform(&pdev->dev, &acp_asoc_platform);
        if (status != 0) {
        u16 bank;
        struct audio_drv_data *adata = dev_get_drvdata(dev);
 
-       acp_init(adata->acp_mmio);
+       acp_init(adata->acp_mmio, adata->asic_type);
 
        if (adata->play_stream && adata->play_stream->runtime) {
-               for (bank = 1; bank <= 4; bank++)
-                       acp_set_sram_bank_state(adata->acp_mmio, bank,
+               /* For Stoney, Memory gating is disabled,i.e SRAM Banks
+                * won't be turned off. The default state for SRAM banks is ON.
+                * Setting SRAM bank state code skipped for STONEY platform.
+                */
+               if (adata->asic_type != CHIP_STONEY) {
+                       for (bank = 1; bank <= 4; bank++)
+                               acp_set_sram_bank_state(adata->acp_mmio, bank,
                                                true);
+               }
                config_acp_dma(adata->acp_mmio,
                                adata->play_stream->runtime->private_data);
        }
        if (adata->capture_stream && adata->capture_stream->runtime) {
-               for (bank = 5; bank <= 8; bank++)
-                       acp_set_sram_bank_state(adata->acp_mmio, bank,
+               if (adata->asic_type != CHIP_STONEY) {
+                       for (bank = 5; bank <= 8; bank++)
+                               acp_set_sram_bank_state(adata->acp_mmio, bank,
                                                true);
+               }
                config_acp_dma(adata->acp_mmio,
                                adata->capture_stream->runtime->private_data);
        }
 {
        struct audio_drv_data *adata = dev_get_drvdata(dev);
 
-       acp_init(adata->acp_mmio);
+       acp_init(adata->acp_mmio, adata->asic_type);
        acp_reg_write(1, adata->acp_mmio, mmACP_EXTERNAL_INTR_ENB);
        return 0;
 }
 
 module_platform_driver(acp_dma_driver);
 
+MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
 MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
 MODULE_DESCRIPTION("AMD ACP PCM Driver");
 MODULE_LICENSE("GPL v2");