drm/i915/dsi: Fix overflow issue in pclk parsing

Parsed divider p will overflow and is considered being valid in case
pll_ctl == 0.

Fix this by checking divider p before decreasing it. Also small improvement
is made by using fls() instead of custom loop.

v2: use fls() and check parsed divider

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://lore.kernel.org/r/20250807042635.2491537-1-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
index b52463fdec472c151ef4461ead1f62794b7dd32a..83afe1315e9667251ca2a9b679c220cc2f058516 100644 (file)
--- a/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi_pll.c
@@ -142,11 +142,9 @@ static int vlv_dsi_pclk(struct intel_encoder *encoder,
        pll_div &= DSI_PLL_M1_DIV_MASK;
        pll_div = pll_div >> DSI_PLL_M1_DIV_SHIFT;
 
-       while (pll_ctl) {
-               pll_ctl = pll_ctl >> 1;
-               p++;
-       }
-       p--;
+       p = fls(pll_ctl);
+       if (p)
+               p--;
 
        if (!p) {
                drm_err(display->drm, "wrong P1 divisor\n");