]> www.infradead.org Git - users/hch/misc.git/commitdiff
riscv: kprobes: Move branch_rs2_idx to insn.h
authorNam Cao <namcao@linutronix.de>
Sun, 11 May 2025 21:17:53 +0000 (23:17 +0200)
committerPaul Walmsley <pjw@kernel.org>
Wed, 17 Sep 2025 00:46:43 +0000 (18:46 -0600)
Similar to other instruction-processing macros/functions, branch_rs2_idx
should be in insn.h.

Move it into insn.h as RV_EXTRACT_RS2_REG. This new name matches the style
in insn.h.

Signed-off-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Link: https://lore.kernel.org/linux-riscv/107d4a6c1818bf169be2407b273a0483e6d55bbb.1747215274.git.namcao@linutronix.de/
[pjw@kernel.org: updated to use RV_X_MASK and to apply]
Signed-off-by: Paul Walmsley <pjw@kernel.org>
arch/riscv/include/asm/insn.h
arch/riscv/kernel/probes/simulate-insn.c

index 89ae44fb408838f42df4abe837c63f0b91ed104f..a7ab9bc24a3ae2505dfb47d99a02d079d6d14db0 100644 (file)
@@ -64,6 +64,7 @@
 #define RVG_RS2_OPOFF          20
 #define RVG_RD_OPOFF           7
 #define RVG_RS1_MASK           GENMASK(4, 0)
+#define RVG_RS2_MASK           GENMASK(4, 0)
 #define RVG_RD_MASK            GENMASK(4, 0)
 
 /* The bit field of immediate value in RVC J instruction */
@@ -457,6 +458,10 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code)
        ({typeof(x) x_ = (x); \
        (RV_X_MASK(x_, RVG_RS1_OPOFF, RVG_RS1_MASK)); })
 
+#define RV_EXTRACT_RS2_REG(x) \
+       ({typeof(x) x_ = (x); \
+       (RV_X_MASK(x_, RVG_RS2_OPOFF, RVG_RS2_MASK)); })
+
 #define RV_EXTRACT_RD_REG(x) \
        ({typeof(x) x_ = (x); \
        (RV_X_MASK(x_, RVG_RD_OPOFF, RVG_RD_MASK)); })
index 6c166029079c42bf71f0d0a5b0c28308027680c6..77be381bb8b4723937554d5ced4e5a31f005ac54 100644 (file)
@@ -121,9 +121,6 @@ bool __kprobes simulate_auipc(u32 opcode, unsigned long addr, struct pt_regs *re
 #define branch_rs1_idx(opcode) \
        (((opcode) >> 15) & 0x1f)
 
-#define branch_rs2_idx(opcode) \
-       (((opcode) >> 20) & 0x1f)
-
 #define branch_funct3(opcode) \
        (((opcode) >> 12) & 0x7)
 
@@ -157,7 +154,7 @@ bool __kprobes simulate_branch(u32 opcode, unsigned long addr, struct pt_regs *r
        unsigned long rs2_val;
 
        if (!rv_insn_reg_get_val(regs, branch_rs1_idx(opcode), &rs1_val) ||
-           !rv_insn_reg_get_val(regs, branch_rs2_idx(opcode), &rs2_val))
+           !rv_insn_reg_get_val(regs, RV_EXTRACT_RS2_REG(opcode), &rs2_val))
                return false;
 
        offset_tmp = branch_offset(opcode);