]> www.infradead.org Git - linux.git/commitdiff
arm64: dts: amlogic: Drop redundant CPU "clock-latency"
authorRob Herring (Arm) <robh@kernel.org>
Thu, 10 Apr 2025 15:47:32 +0000 (10:47 -0500)
committerNeil Armstrong <neil.armstrong@linaro.org>
Tue, 22 Apr 2025 07:25:47 +0000 (09:25 +0200)
The "clock-latency" property is part of the deprecated opp-v1 binding
and is redundant if the opp-v2 table has equal or larger values in any
"clock-latency-ns". Add any missing "clock-latency-ns" properties and
remove "clock-latency".

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-11-63d7dc9ddd0a@kernel.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
23 files changed:
arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts
arch/arm64/boot/dts/amlogic/meson-g12a-radxa-zero.dts
arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts
arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts
arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-a311d-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-bananapi.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-odroid-go-ultra.dts
arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-radxa-zero2.dts
arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi
arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi
arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi
arch/arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi
arch/arm64/boot/dts/amlogic/meson-sm1-khadas-vim3l.dts
arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi
arch/arm64/boot/dts/amlogic/meson-sm1-s905d3-libretech-cc.dts
arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi

index 9aa36f17ffa2d0d16bb6f14ed4488dede5ff3d78..d0a3b4b9229cc60394fe122fa1124a135866e0d6 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &ethmac {
index 952b8d02e5c262ff24139344fccfe4a174571038..4353485c6f26b98eeeb37d8dfb3964c906b80f8e 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cvbs_vdac_port {
index 52fbc5103e45015a07e894f147d67075a9c674c5..f39fcabc763f1ab1e22cf38e7766e12e42c046e6 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cvbs_vdac_port {
index 5407049d264706c6e44def460d1c6e9c3ceb7e44..b5bf8ecc91e653e4a4082c5a4d17dba8239dbf47 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &clkc_audio {
index 01da83658ae3a7844caf4d1b141d96cbce424910..5ab460a3e637f714fe38f9b4ad106198c1709d5a 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cvbs_vdac_port {
index 543e70669df54afab046c09e9c154e8956eda5f0..deee61dbe0741f52556fd89f8be18e4620d2ed85 100644 (file)
@@ -62,6 +62,7 @@
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <731000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {
index adedc1340c78478521f462a18fc5280ba11e7023..415248931ab17652ee01d17d30ae22cdf3f0fbb5 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &pwm_ab {
index 8e9ad1e51d665e33f949c1237809af6771020b00..8ecb5bd125c1a4729c63d7f2b3edb4a2fecef5eb 100644 (file)
@@ -14,6 +14,7 @@
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <761000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {
@@ -54,6 +55,7 @@
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <731000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {
index 92e8b26eccccba1e2aa83378b74870a68344071b..39011b645128cb9ee1107f4731d56840f2bdf5a7 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &ext_mdio {
index 54663c55a20e68213c480e7fa7dac7624946cf6f..1b08303c42822ba94f600ef6e19ca057bf5fe7ed 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &ethmac {
index 48650bad230da20baa1fb8618021708bbe53f63f..fc737499f207aa7c873371de5a59ca2a70e7c24b 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &pwm_ab {
index e21831dfceeea728e05c7a4ecbf93bd22fc85aba..d5938a4a6da375e5fbff89c761e634e7b85775fe 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 /* RK817 only supports 12.5mV steps, round up the values */
index 7e8964bacfce705a3de4c208543324569c5cb3d5..3298d59833b643d2e925c80dc20778210ac937a5 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu_thermal {
index fc05ecf90714dd999276d751ec565ab7dcfb1db3..1e5c6f98494564aa61c9da269488bd52fd270b6b 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu_thermal {
index 44c23c984034cc4799583e92282ae7799e11e710..19cad93a68897ca00856983a936409d36786b3e4 100644 (file)
@@ -14,6 +14,7 @@
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <731000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {
@@ -59,6 +60,7 @@
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <771000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {
index a7a0fc264cdcf0f66565f9a52144f583dbbf16bf..9b6d780eada777a8314c9877f75c635076404c01 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table_0>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu100 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu101 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu102 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu103 {
        cpu-supply = <&vddcpu_a>;
        operating-points-v2 = <&cpub_opp_table_1>;
        clocks = <&clkc CLKID_CPUB_CLK>;
-       clock-latency = <50000>;
 };
 
 &cvbs_vdac_port {
index a3463149db3d2ce670cce5a7b42308bcd3cc771a..9be3084b090d2441098d97155e8d56d54560799b 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
 
 &cvbs_vdac_port {
index 40db95f64636d29294ba24d1a335435c74a87729..538b35036954fba115a6759030d2d4fa5ea793d9 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
 
 &ext_mdio {
index 5d75ad3f3e46b7d8f5a036df0c42f0af1ffa2f31..a3d9b66b6878fb2744e8dc31a95c53fa837613e1 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
 
 &pwm_AO_cd {
index ad8d0788376039e622f303f3c7a6b4dddf0521cf..c4524eb4f0996dfbccec16ca5b936a5c3b2663a5 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
 
 &ext_mdio {
index 537370db360fc36ac84015e0e1fb59ac43f7afe5..5daadfb170b42cc52f74052593218fc0c6709053 100644 (file)
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu_b>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
index 37d7f64b6d5d8ffa4aca0c4c56741da29dcf943f..024d2eb8e6ee0f6a198cd70f144dfd0a0b26fa61 100644 (file)
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu1 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU1_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu2 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU2_CLK>;
-       clock-latency = <50000>;
 };
 
 &cpu3 {
        cpu-supply = <&vddcpu>;
        operating-points-v2 = <&cpu_opp_table>;
        clocks = <&clkc CLKID_CPU3_CLK>;
-       clock-latency = <50000>;
 };
 
 &ethmac {
index 97e4b52066dcf205156b3525cbf411650635af14..966ebb19cc55f4df8e3ee061ab35fa8a22e3384d 100644 (file)
                opp-1000000000 {
                        opp-hz = /bits/ 64 <1000000000>;
                        opp-microvolt = <770000>;
+                       clock-latency-ns = <50000>;
                };
 
                opp-1200000000 {